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FDMS7572S 데이터시트 PDF : 부품 기능 및 핀배열

부품번호 FDMS7572S
기능 MOSFET
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FDMS7572S 데이터시트 및 FDMS7572S PDF

1페이지

FDMS7572S pdf, 반도체, 판매, 대치품
Typical Characteristics TJ = 25 °C unless otherwise noted
10
ID = 23A
8
VDD = 13 V
6
VDD = 10 V
4
VDD = 16 V
5000
1000
Ciss
Coss
2
0
0 5 10 15 20 25 30
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
35
f = 1 MHz
100 VGS = 0 V
Crss
50
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
30
Figure8. CapacitancevsDrain
to Source Voltage
50
TJ = 25 oC
10
TJ = 100 oC
120
VGS = 10 V
90
VGS = 4.5 V
60
TJ = 125 oC
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE (ms)
1000
Figure 9. Unclamped Inductive Switching Capability
200
100
10
1 THIS AREA IS
LIMITED BY rDS(on)
0.1
0.01
0.01
SINGLE PULSE
TJ = MAX RATED
RθJA = 125 oC/W
TA = 25 oC
0.1 1
10
VDS, DRAIN to SOURCE VOLTAGE (V)
100 μs
1 ms
10 ms
100 ms
1s
10 s
DC
100
Figure 11. Forward Bias Safe
Operating Area
30
Limited by Package
RθJC = 2.3 oC/W
0
25 50 75 100 125
Tc, CASE TEMPERATURE (oC)
150
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
1000
VGS = 10 V
100
10
SINGLE PULSE
RθJA = 125 oC/W
1 TA = 25 oC
0.5
10-4 10-3 10-2
10-1
1
10
t, PULSE WIDTH (sec)
100 1000
Figure 12. Single Pulse Maximum
Power Dissipation
FDMS7572S Rev.C2
4 www.fairchildsemi.com

4페이지

FDMS7572S 전자부품, 판매, 대치품
Dimensional Outline and Pad Layout
5 .2 0
4 .80
A
P KG
8 CL
5
B
S EE
DETAIL B
8
0.77
5 .10
3.9 1
0.64
7 65
1 .27
PKG CL
( 0.34 )
0.7 6
0.4 4
(0 .50)
(0 .30)
(3.40 ) (2X )
4.52
6.25
5 .8 5
3.75
5.90
5 .6 5
6 .6 1
14
TOP V IEW
5 .0 0
4 .80
S EE
DETAIL C
OPTIONAL DRAFT
ANG LE MAY AP PE AR
ON FOUR SIDES
OF THE PACKA GE
1 .2 7
KEEP O UT
ARE A
1 2 34
1 .2 7
3.8 1
LAN D PA TTE RN
REC OM MEND ATION
0.61
0 .3 5
0 .1 5
S IDE V IEW
3.8 1
1 .27
12
34
0 .10 C
8X
0 .0 8 C
1 .10
0 .9 0
0.5
0.3
1
1
(
8X
)
0.10
CAB
(0 .52)
3.7 8
3.3 8
4.2 2
3.99
0 .3 5
0 .1 5
DE TAIL C
SCALE : 2 :1
0 .05
0 .00
0.30
0.06
C
SE ATING
P LA NE
DE TAIL B
SCALE: 2:1
N OTES: UNLESS OTHERWISE SPECIFIED
A. PACKAG E STAND ARD RE FERENCE: JEDEC M O- 240 ,
ISS UE A, VAR. AA, DATED O CTOBER 2 00 2.
B. DIMENSIONS DO N OT INCLUDE BURRS OR MO LD FL AS H.
MO LD FLASH O R BURRS DOE S NOT EXCEE D 0.10 MM.
C . AL L DIMEN SIONS ARE IN MIL LIMETERS.
D . DIMENSIONING AND TOL ER ANCING PER ASME Y1 4.5M- 199 4.
E. IT IS RECOMMENDE D TO HAVE NO TRACES O R
VIA S WITHIN TH E KEEP OUT ARE A.
F. DRAW ING FIL E NA ME: PQFN0 8AREV8
876
3 .9 6
3 .6 1
5
0.64
0.34
B O TTO M VIE W
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, spe-
cifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
https://www.fairchildsemi.com/evaluate/package-specifications/packageDetails.html?id=PN_PQOAM-008
FDMS7572S Rev.C2
7 www.fairchildsemi.com

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부품번호상세설명 및 기능제조사
FDMS7572S

The functions of this components is a MOSFET.

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