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W78C438C 데이터시트 PDF : 부품 기능 및 핀배열

부품번호 W78C438C
기능 8-BIT MICROCONTROLLER
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W78C438C 데이터시트 및 W78C438C PDF

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W78C438C pdf, 반도체, 판매, 대치품
W78C438C
4. PIN DESCRIPTION
P0.0P0.7 I/O Port 0
These pins function the same as those in the W78C32, except that a multiplexed address/data bus is
not provided during accesses to external memory.
P1.0P1.7 I/O Port 1
Functions are the same as in the W78C32.
P2.0P2.7 I/O Port 2
Functions are the same as in the W78C32, except that an upper address bus is not provided during
accesses to external memory.
P3.0P3.7 I/O Port 3
Functions are the same as in the W78C32.
DP4.0DP4.7 Data/Address Bus
DP4 provides multiplexed low-byte address/data during access to external memory.
AP5.0AP5.7 Address Bus
AP5 outputs the <7:0> address of the external ROM multiplexed with the <7:0> address of the external
data RAM.
AP6.0AP6.7 Address Bus
AP6 outputs the <15:8> address of the external ROM multiplexed with the <15:8> address of the
external data RAM. During the execution of "MOVX @Ri," the output of AP6 comes from the HB
register, which is the page register for the high byte address, and its address is 0A1H.
AP7.0AP7.3 Address Bus/Chip Select Pins
Set bit 7 of the EPMA (Extended Program Memory Address) register to determine the functions of port
7. When this bit is "0" (default value), AP7 allows the external memory data to be accessed by
outputting the <19:16> address of the external memory from bits<3:0> of the EPMA register during the
execution of "MOVC A, @A+DPTR" or "MOVX dest, src." At all other times, AP7<3:0> will output 0H.
When this bit is "1," AP7<3:0> (CS30) are the chip select pins, which support memory-mapped
peripheral device select, and only one pin is active low at any one time. These pins are decoded by
AP6<7:6>. For details, see the table below.
AP6.7
0
0
1
1
AP6.6
0
1
0
1
DESCRIPTION
AP70: low; others: high
AP71: low; others: high
AP72: low; others: high
AP73: low; others: high
-4-

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W78C438C 전자부품, 판매, 대치품
W78C438C
(A) EPMA.7 = 0
W78C438
P0 AP5
AP6
P1 AP7
DP4
P2
PSEN
P8
INT0
INT1
INT2
INT3
RD P3
WR
ADDR (20-bit)
\8
\8
\4
\8
EPROM
64K PROGRAM
DATA AREA
OE
RAM
ADDR 1MB
(20-bit)
DATA
WE
OE
When bit 7 of the EPMA is "1," AP7<3:0> are the output pins that support memory-mapped peripheral
chip select logic, which eliminates the need for glue logic. These pins are decoded by AP6<7:6>. Only
one pin is active low at any time. That is, they are active individually with 16K address resolution. For
example, CS0 is active low in the address range from 0000H to 3FFFH, CS1 is active low in the
address range from 4000H to 7FFFH, and so forth.
(B) EPMA.7 = 1
W78C438
P0 AP5
AP6
P1
DP4
P2
PSEN
P8
INT0
INT1
INT2
INT3
P3
AP7.0
AP7.1
RD AP7.2
AP7.3
WR
ADDR (16-bit)
\8
\8
\8
EPROM
64K PROGRAM
DATA AREA
OE
\8
RAM
Device
ADDR (14-bit)
Device
\ 6 Device
0000h 4000h
DATA
8000h C000h
3FFFh 7FFFh
BFFFh FFFFh
(16k)
(16k)
(16k)
(16k)
WE
OE
Publication Release Date: March 10, 2010
- 7 - Revision A7

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The functions of this components is a 8-BIT MICROCONTROLLER.

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