PDF CS2843A Data sheet ( Hoja de datos )

Número de pieza	CS2843A
Descripción	Off-Line Current Mode PWM Control Circuit with Undervoltage Lockout
Fabricantes	Cherry Semiconductor Corporation
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No Preview Available ! CS2842A/CS3842A CS2843A/CS3843A Off-Line Current Mode PWM Control Circuit with Undervoltage Lockout Description Features The CS284XA, CS384XA provides all the necessary features to implement off-line fixed frequency current-mode control with a minimum number of external components. The CS384XA family incorporates a new precision temperature-controlled oscillator with an internally trimmed discharge current to minimize varia- tions in frequency. A precision duty- cycle clamp eliminates the need for an external oscillator when a 50% duty- cycle is used. Duty-cycles greater than 50% are also possible. On board logic ensures that VREF is stabilized before the output stage is enabled. Ion implant resistors provide tighter con- trol of undervoltage lockout. Other features include low start-up current, pulse-by-pulse current limit- ing, and a high-current totem pole out- put for driving capacitive loads, such as the gate of power MOSFET. The out- put is LOW in the off state, consistent with N-channel devices. The CS384XA series of current-mode control ICs are available in 8 and14 lead packages for surface mount (SO) applications as well as 8 lead PDIP packages. Absolute Maximum Ratings Supply Voltage (ICC<30mA).........................................................................Self Limiting Supply Voltage (Low Impedance Source) .................................................................30V Output Current..............................................................................................................±1A Output Energy (Capacitive Load) ................................................................................5µJ Analog Inputs (VFB, Sense) ...........................................................................-0.3V to 5.5V Error Amp Output Sink Current .............................................................................10mA Lead Temperature Soldering Wave Solder (through hole styles only) ..........10 sec. max, 260°C peak Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak Block Diagram VCC Gnd OSC VFB COMP Sense Undervoltage Lock-out Circuit 34V Set/ 5V Reset Reference 16V/10V (8.4V/7.6V) 2.50V Output Enable Oscillator Internal Bias NOR + – Error VC Amplifier 2R R S R 1 V Current Sensing Comparator PWM Latch ( ) Indicates CS-2843A/3843A VCC Pwr VREF VOUT Pwr Gnd s Optimized for Off-line Control s Internally Trimmed Temperature Compensated Oscillator s Maximum Duty-cycle Clamp s VREF stabilized before Output Stage is Enabled s Low Start-up Current s Pulse-by-pulse Current Limiting s Improved Undervoltage Lockout s Double Pulse Suppression s 1% Trimmed Bandgap Reference s High Current Totem Pole Output Package Options 8 Lead PDIP & SO Narrow COMP 1 VFB 2 Sense 3 OSC 4 8 VREF 7 VCC 6 VOUT 5 Gnd 14 Lead SO Narrow COMP 1 NC 2 VFB 3 NC 4 Sense 5 NC 6 OSC 7 14 VREF 13 NC 12 VCC 11 VCC Pwr 10 VOUT 9 Pwr Gnd 8 Gnd Rev. 10/23/98 Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: [email protected] Web Site: www.cherry-semi.com 1 A ® Company 1 page Circuit Description: continued former saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of oscillator com- VOSC ponents. OSC RESET EA Output Switch Current VCC IOUT VOUT Figure 2: Timing Diagram for key CS2841B parameters Setting the Oscillator Oscillator timing capacitor, CT, is charged by VREF through RT and discharged by an internal current source. During the discharge time, the internal clock signal blanks out the output to the Low state, thus providing a user selected maximum duty cycle clamp. Charge and discharge times are determined by the formula: ( )tc = RTCT ln VREF - Vlower VREF - Vupper ( )td = RTCT ln VREF - IdRT - Vlower VREF - IdRT - Vupper VREF OSC Gnd RT CT Timing parameters Vupper Vlower Sawtooth Mode LARGE RT (≈10kΩ) tc td VOSC Substituting in typical values for the parameters in the above formulas: VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA tc ≈ 0.5534RTCT ( )td = RTCT ln 2.3 - 0.0083 RT 4.0 - 0.0083 RT The frequency and maximum duty cycle can be deter- mined using the Typical Performance Characteristic graphs. Grounding High peak currents associated with capacitive loads neces- sitate careful grounding techniques. Timing and bypass capacitors should be connected close to Gnd pin in a sin- gle point ground. The transistor and 5kΩ potentiometer, shown in the test circuit, are used to sample the oscillator waveform and apply an adjustable ramp to Sense. Triangular Mode SMALL RT (≈700kΩ) Internal Clock VREF Internal Clock Figure 3: Oscillator Timing Network and parameters 5 5 Page

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