PDF CS3843BGDR14 Data sheet ( Hoja de datos )

Número de pieza	CS3843BGDR14
Descripción	Off-Line Current Mode PWM Control Circuit Off-Line Current Mode PWM Control Circuit
Fabricantes	Cherry Semiconductor Corporation
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No Preview Available ! CS3842B/CS3843B Off-Line Current Mode PWM Control Circuit with Very Low Start Up Current Description Features The CS384XB provides all the neces- sary features to implement off-line fixed frequency current-mode control with a minimum number of external components. The family has been opti- mized for very low start up current (300µA, typ). The CS384XB family incorporates a precision temperature-controlled oscil- lator with an internally trimmed dis- charge current to minimize variations in frequency. A precision duty-cycle clamp eliminates the need for an exter- nal oscillator when a 50% duty-cycle is used. Duty-cycles of almost 100% are possible. On board logic ensures that VREF is stabilized before the output stage is enabled. Ion-implant resistors provide tighter control of undervoltage lockout. Other features include pulse-by-pulse current limiting, and a high-current totem pole output for driving capaci- tive loads, such as the gate of a power MOSFET. The output is LOW in the off state, consistent with N-channel devices. These ICs are available in 8 and 14 lead surface mount (SO) and 8 lead PDIP packages. Absolute Maximum Ratings Supply Voltage (ICC<30mA) ..........................................................Self Limiting Supply Voltage (Low Impedance Source)...................................................30V Output Current ...............................................................................................±1A Output Energy (Capacitive Load) .................................................................5µJ Analog Inputs (VFB, Sense) ............................................................-0.3V to 5.5V Error Amp Output Sink Current...............................................................10mA Lead Temperature Soldering Wave Solder (through hole styles only) ...................10 sec. max, 260°C peak Reflow (SMD styles only) ....................60 sec. max above 183°C, 230°C peak Block Diagram VCC Gnd OSC VFB COMP Sense 34V Undervoltage Lock-out Circuit Set/ 5V Reset Reference 16V/10V (8.4V/7.6V) REF 2.50V Output Enable Oscillator Internal Bias NOR + – Error VC Amplifier 2R R S R 1 V Current Sense Comparator PWM Latch ( ) Indicates CS-3843B VCC Pwr VREF V O UT Pwr Gnd s Very low Start Up Current (300µA typ) s Optimized Off-line Control s Internally Trimmed, Temperature Compensated Oscillator s Maximum Duty-cycle Clamp s OVRuEtFpsuttabEinlaizbalteion before s Pulse-by-pulse Current Limiting s Improved Undervoltage Lockout s Double Pulse Suppression s 1% Trimmed Bandgap Reference s High Current Totem Pole Output Package Options 8 Lead PDIP & SO Narrow COMP 1 VFB 2 Sense 3 OSC 4 8 VREF 7 VCC 6 VOUT 5 Gnd 14L SO Narrow COMP 1 NC 2 VFB 3 NC 4 Sense 5 NC 6 OSC 7 14 VREF 13 NC 12 VCC 11 VCC Pwr 10 VOUT 9 Pwr Gnd 8 Gnd Rev. 6/23/99 Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: [email protected] Web Site: www.cherry-semi.com 1 A ® Company 1 page VOSC OSC RESET EA Output Switch Current VCC IOUT VOUT Figure 2: Timing Diagram for key CS-384XB parameters Figure 3: Oscillator cycle tends to exceed the maximum allowed, to prevent transformer saturation in some power supplies, the inter- nal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of oscillator timing components. Setting the Oscillator The oscillator timing capacitor, CT, is charged by VREF through RT and discharged by an internal current source (Figure 3). During the discharge time, the internal clock signal blanks out the output to the Low state, thus provid- ing a user selected maximum duty cycle clamp. Charge and discharge times are determined by the general formulas: ( )tc = RTCT ln VREF – Vlower VREF – Vupper ( )td = RTCT ln VREF – Id RT –Vlower VREF – Id RT – Vupper VREF OSC Gnd RT CT Vupper Vlower tc Sawtooth Mode LARGE RT (≈10kΩ) td VOSC Triangular Mode SMALL RT (≈700kΩ) Internal Clock VREF Substituting in typical values for the parameters in the above formulas: VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA, then tc ≈ 0.5534RTCT ( )td = RTCT ln 2.3 – 0.0083 RT 4.0 – 0.0083 RT The frequency and maximum duty cycle can be deter- mined from the Typical Performance Characteristics graphs. Grounding High peak currents associated with capacitive loads neces- sitate careful grounding techniques. Timing and bypass capacitors should be connected close to ground in a single point ground. The transistor and 5kΩ potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Sense. Internal Clock Figure 3: Oscillator Timing Network and parameters 5 5 Page

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