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PDF CS3865C Data sheet ( Hoja de datos )
| Número de pieza | CS3865C | |
| Descripción | High Performance Dual Channel Current Mode Controller with ENABLE | |
| Fabricantes | Cherry Semiconductor Corporation | |
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CS3865C
High Performance Dual Channel
Current Mode Controller with ENABLE
Description
Features
The CS3865C is a high perfor-
mance, fixed frequency, dual cur-
rent mode controller. It is used in
Off-Line and DC to DC converter
applications and require a mini-
mum number of external compo-
nents. This integrated circuit fea-
tures a unique oscillator for precise
duty cycle limit and frequency con-
trol, a temperature compensated
reference, two high gain error
amplifiers, two current sensing
comparators, and two high current
totem pole outputs ideally suited
for driving power MOSFETs. One
of the outputs VOUT2 is switchable
via the ENABLE 2 pin.
Also included are protective fea-
tures consisting of input and refer-
ence undervoltage lockouts each
with hysteresis, cycle-by-cycle cur-
rent limiting, and a latch for single
pulse metering of each output.
The CS3865C has a 14V start volt-
age and is pin compatible with the
MC34065H.
VREF
Block Diagram
5.0V Ref
VREF
Undervoltage
Lockout
VCC
VCC
Undervoltage
Lockout
s Oscillator has Precise
Duty Cycle
Limit and Frequency
Control
s 500kHz Current Mode
Operation
s Automatic Feed Forward
Compensation
s Separate Latching PWMs
for Cycle-By-Cycle
Current Limiting
s Internally Trimmed
Reference with
Undervoltage Lockout
s Switchable Second
Output
s Two High Current Totem
Pole Outputs
s Input Undervoltage
Lockout with Hysteresis
s Low Start-Up and
Operating Current
SYNC
CT
RT
VFB1
COMP1
ENABLE2
VFB2
COMP2
Oscillator
+
-
Error
Amp 1
+
-
Error
Amp 2
Gnd
Latching
PWM 1
Latching
PWM 2
Pwr Gnd
Rev. 12/16/96
1
VOUT1
Sense1
VOUT2
Sense2
Package Options
16L PDIP & SO Wide
SYNC 1
CT 2
RT 3
VFB1 4
COMP1 5
Sense1 6
VOUT1 7
Gnd 8
16 VCC
15 VREF
14 ENABLE2
13 VFB2
12 COMP2
11 Sense2
10 VOUT2
9 Pwr Gnd
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: [email protected]
Web Site: www.cherry-semi.com
A ® Company
1 page  
Typical Performance Characteristics: continued
Reference Voltage Change vs. Source Current
Reference Short Circuit Current vs. Temperature
0
VCC = 15V
-4.0
-8.0
TA = –55°C
-12
TA =
-16 25°C
TA = 125°C
-20
-24
0
20 40 60 80 100
I ref, REFERENCE SOURCE CURRENT (mA)
120
120
100
80
60-55
-25 0 25 50 75 100
TA, AMBIENT TEMPERATURE (°C)
125
Output Saturation Voltage vs. Load Current
0
VCC
-1.0
-2.0
SOURCE SATURATION
(LOAD TO GROUND)
VCC=15V
80µS PULSED LOAD
120Hz RATE
TA=25°C
TA= –55°C
2.0
1.0
0
0
TA= –55°C
TA=25°C
GND
SINK
SATURATION
(LOAD TO VCC)
200 400 600 800
OUTPUT LOAD CURRENT (mA)
Supply Current vs. Supply Voltage CS3865C
32
RT=8.2kΩ
CT=3.3nF
24 VFB 1.2=0V
CURRENT SENSE 1.2=0V
TA=25°C
16
8.0
0
0 4.0 8.0 12 16 20
VCC, SUPPLY VOLTAGE (V)
Operating Description
The CS3865C is a high performance, fixed frequency, dual
channel current mode PWM controller specifically
designed for off-line and DC to DC converter applications.
It offers the designer a cost effective solution with minimal
external components where independent regulation of two
power converters is required. Each channel contains a high
gain error amplifier, current sensing comparator, pulse
width modulator latch, and totem pole output driver. The
oscillator, reference, and undervoltage lockout circuits are
common to both channels.
Oscillator
The oscillator uses precise frequency and duty cycle con-
trol. The frequency is programmed by the values RT and
CT. Capacitor, CT, is charged and discharged by an equal
magnitude internal current source and sink, generating a
symmetrical 50 percent duty cycle waveform at CT. The
oscillator peak and valley thresholds are 3.5V and 1.6V
respectively. The source/sink current magnitude is con-
trolled by resistor RT. For proper operation over tempera-
ture range, its value should be between 4.0kΩ and 16kΩ.
As CT charges and discharges, an internal blanking pulse
is generated that alternately drives the inputs of the upper
and lower NOR gates high. This, in conjunction with a
precise amount of delay time introduced into each chan-
nel, produces well defined non-overlapping output duty
cycles. The second output, VOUT2 is enabled while CT is
charging, and the primary is enabled during the discharge.
Even at 500kHz, each output is capable of approximately
44% duty cycle, making this controller suitable for high
frequency power conversion applications.
In many noise sensitive applications, it may be necessary
to synchronize the converter with an external system
clock. This can be accomplished by applying an external
clock signal. For reliable synchronization, the oscillator fre-
quency should be set about 10% slower than the clock fre-
quency. The rising edge of the clock signal applied to
SYNC, terminates CT‘s charging and VOUT2‘s conduction.
By tailoring the clock waveform symmetry, accurate duty
cycle clamping of either output can be achieved.
Error Amplifier
Each channel contains a fully-compensated error amplifi-
er. The output and inverting input nodes are accessible.
The amplifier features a typical dc voltage gain of 100 dB,
and a unity gain bandwidth of 1.0 MHz with 71 degrees of
phase margin. The non-inverting input is internally biased
at 2.5V. The converter output voltage is typically divided
down and monitored by the inverting input through a
resistor divider. The maximum input bias current is -1.0µA
which will cause an output voltage error that is equal to
the product of the input bias current and the equivalent
input divider resistance.
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CS3865C.PDF ] | |
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