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CS4221 데이터시트 PDF




Cirrus Logic에서 제조한 전자 부품 CS4221은 전자 산업 및 응용 분야에서
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부품번호 CS4221 기능
기능 24-Bit Stereo Audio Codec with 3V Interface
제조업체 Cirrus Logic
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CS4221 데이터시트, 핀배열, 회로
CS4220
CS4221
24-Bit Stereo Audio Codec with 3V Interface
Features
l 100 dB Dynamic Range A/D Converters
l 100 dB Dynamic Range D/A Converters
l 105 dB DAC Signal-to-Noise Ratio (EIAJ)
l Analog Volume Control (CS4221 only)
l Differential Inputs / Outputs
l On-chip Anti-aliasing and Output Smoothing
Filters
l De-emphasis for 32, 44.1 and 48 kHz
l Supports Master and Slave Modes
l Single +5 V power supply
l On-Chip Crystal Oscillator
l 3 - 5 V Digital Interface
Description
The CS4220/1 is a highly integrated, high performance,
24-bit, audio codec providing stereo analog-to-digital
and stereo digital-to-analog converters using delta-sig-
ma conversion techniques. The device operates from a
single +5 V power supply, and features low power con-
sumption. Selectable de-emphasis filter for 32, 44.1, and
48 kHz sample rates is also included.
The CS4221 also includes an analog volume control ca-
pable of 113.5 dB attenuation in 0.5 dB steps. The
analog volume control architecture preserves dynamic
range during attenuation. Volume control changes are
implemented using a “soft” ramping or zero crossing
technique.
Applications include digital effects processors, DAT, and
multitrack recorders.
ORDERING INFORMATION
CS4220-KS -10 to +70 °C 28-pin SSOP
CS4221-KS -10 to +70 °C 28-pin SSOP
CDB4220/1
Evaluation Board
I
RST
LRCK
SCLK
SDIN
SDOUT
(DIF1)
(DIF0) (DEM0) (DEM1)
SCL/CCLK SDA/CDIN AD0/CS I 2C/SPI
VL MCLK VD VA
Control Port
Left
DAC
Volume *
Control
Voltage
Reference
AOUTL+
AOUTL-
Right
DAC
Volume *
Control
Clock OSC
Left
ADC
Right
ADC
XTI XTO
( ) = CS4220
DGND
* = CS4221
AGND
AOUTR+
AOUTR-
AINL-
AINL+
AINR-
AINR+
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 1999
(All Rights Reserved)
APR ‘00
DS284PP3
1




CS4221 pdf, 반도체, 판매, 대치품
CS4220 CS4221
1. CHARACTERISTICS AND SPECIFICATIONS
ANALOG CHARACTERISTICS (TA = 25° C; VA, VD = +5 V; Full Scale Input Sine wave, 997 Hz;
Fs = 48 kHz; Measurement Bandwidth is 20 Hz to 20 kHz; Local components as shown in Figures 4 and 5; SPI®
mode, Format 0, unless otherwise specified.)
CS4220/1 - KS
Parameter
Symbol
Analog Input Characteristics
ADC Resolution
Total Harmonic Distortion
THD
Dynamic Range
A-weighted
unweighted
Total Harmonic Distortion + Noise
(Note 1) THD+N
Interchannel Isolation
(1 kHz)
Interchannel Gain Mismatch
Offset Error
with High Pass Filter
Full Scale Input Voltage (Differential)
Gain Drift
Input Resistance
Input Capacitance
Common Mode Input Voltage
A/D Decimation Filter Characteristics
Passband
(Note 2)
Passband Ripple
Stopband
(Note 2)
Stopband Attenuation
(Note 3)
Group Delay (Fs = Output Sample Rate)
tgd
(Note 4)
Group Delay Variation vs. Frequency
High Pass Filter Characteristics
tgd
Frequency Response
-0.1 dB
-3 dB (Note 2)
Phase Deviation @ 20 Hz
(Note 2)
Passband Ripple
Min
-
-
95
92
-
-
-
-
1.9
-
10
-
-
0
-
30
80
-
-
-
-
-
-
Typ
-
0.003
100
97
-92
90
-
-
2.0
100
-
-
2.3
-
-
-
-
15/Fs
-
3.7
20
10
-
Max Unit
24 Bits
-%
- dB
-
-87 dB
- dB
0.1 dB
0 LSB
2.1 Vrms
- ppm/°C
- k
15 pF
-V
21.8
±0.01
6114
-
-
0
kHz
dB
kHz
dB
s
µs
- Hz
-
- Degree
0 dB
Notes: 1. Referenced to typical full-scale differential input voltage (2 Vrms).
2. Filter characteristics scale with output sample rate. For output sample rates, Fs, other than 48 kHz, the
0.01 dB passband edge is 0.4535x Fs and the stopband edge is 0.625x Fs.
3. The analog modulator samples the input at 6.144 MHz for an Fs equal to 48 kHz. There is no rejection
of input signals which are multiples of the sampling frequency (n x 6.144 MHz ±21.8 kHz where
n = 0,1,2,3...).
4. Group delay for Fs = 48 kHz, tgd = 15/48 kHz = 312 µs.
4 DS284PP3

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CS4221 전자부품, 판매, 대치품
CS4220 CS4221
SWITCHING CHARACTERISTICS (TA = 25° C; VA, VD = 4.75 V - 5.25 V; outputs loaded with
30 pF)
Parameter
Audio ADC’s and DAC’s Sample Rate
XTI Frequency
XTI = 256, 384, or 512 Fs
XTI Pulse Width High
XTI = 512 Fs
XTI = 384 Fs
XTI = 256 Fs
XTI Pulse Width Low
XTI = 512 Fs
XTI = 384 Fs
XTI = 256 Fs
XTI Jitter Tolerance
RST Low Time
(Note 10)
SCLK falling edge to SDOUT output valid
DSCK = 0
LRCK edge to MSB valid
SDIN setup time before SCLK rising edge
DSCK = 0
SDIN hold time after SCLK rising edge
DSCK = 0
SCLK Period
SCLK High Time
SCLK Low Time
SCLK rising to LRCK edge
DSCK = 0
LRCK edge to SCLK rising
DSCK = 0
Symbol
Fs
tdpd
tlrpd
tds
tdh
tsckw
tsckh
tsckl
tlrckd
tlrcks
Min
4
1.024
13
21
31
13
21
31
-
10
-
-
25
25
(---1---2---8-1---)---F----s-
40
40
35
40
Typ Max Unit
- 50 kHz
- 26 MHz
- - ns
--
--
- - ns
--
--
500 - psRMS
- - ms
-
(---3---8---4-1---)---F----s- + 20
ns
- 45 ns
- - ns
- - ns
- - ns
- - ns
- - ns
- - ns
- - ns
Notes: 10. After powering up the CS4220/1, PDN should be held low for 10 ms to allow the power supply to settle.
DS284PP3
LRCK
SCLK*
SDIN
SDOUT
t lrckd
t lrcks
t sckh
t sckl
t sckw
t lrpd t ds
t dh
MSB
t dpd
MSB-1
*SCLK shown for DSCK = 0, SCLK inverted for DSCK = 1.
Figure 1. Serial Audio Port Data I/O Timing
7

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