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부품번호 | AD1819A 기능 |
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기능 | AC97 SoundPort Codec | ||
제조업체 | Analog Devices | ||
로고 | |||
전체 28 페이지수
a
AC ’97 SoundPort® Codec
AD1819A
AC '97 FEATURES
ENHANCED FEATURES
Fully Compliant AC ’97 Analog I/O Component
Support for Multiple Codec Communications
48-Terminal TQFP Package
DSP 16-Bit Serial Port Format
Multibit ⌺⌬ Converter Architecture for Improved
Variable 7 kHz to 48 kHz Sampling Rate with 1 Hz
S/N Ratio >90 dB
Resolution
16-Bit Stereo Full-Duplex Codec
Supports Modem Sample Rates and Filtering
Four Analog Line-Level Stereo Inputs for Connection
Phat™ Stereo 3D Stereo Enhancement
from LINE, CD, VIDEO and AUX
Two Analog Line-Level Mono Inputs for Speakerphone
and PC BEEP
Mono MIC Input Switchable from Two External
Sources
High Quality CD Input with Ground Sense
OStereo Line Level Output
Mono Output for Speakerphone
BPower Management Support
VHDL and Verilog Models of Serial Port Available
FUNCTIONAL BLOCK DIAGRAM
S CS0 CS1 CHAIN_IN CHAIN_CLK
OLEMIC1
MIC2
TELINE_IN
AD1819A
0dB/
20dB
MASTER/SLAVE
SYNCHRONIZER
AUX
PGA
16-BIT
⌺⌬ A/D
CONVERTER
CD
VIDEO
PHONE_IN
PGA
16-BIT
⌺⌬ A/D
CONVERTER
RESET
SYNC
LINE_OUT_L
MONO_OUT
LINE_OUT_R
MV
MV
MV
PC_BEEP
G
⌺A
M
G GG G G
A AA A A
M MM M M
⌺
⌺
PHAT
STEREO
⌺⌺⌺⌺ ⌺
⌺
⌺
⌺
PHAT
STEREO
⌺ ⌺⌺ ⌺ ⌺
A G = GAIN
M A = ATTENUATE
M = MUTE
MV = MASTER VOLUME
SAMPLE
RATE
GENERATORS
G 16-BIT
A ⌺⌬ D/A
M CONVERTER
G 16-BIT
A ⌺⌬ D/A
M CONVERTER
OSCILLATORS
XTALO XTALI
BIT_CLK
SDATA_OUT
SDATA_IN
SoundPort is a registered trademark of Analog Devices, Inc.
Phat is a trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998
AD1819A–SPECIFICATIONS
ANALOG-TO-DIGITAL CONVERTERS
Parameter
Min Typ
Max
Units
Resolution
16 Bits
Total Harmonic Distortion (THD)
0.02 %
–74 dB
Dynamic Range (–60 dB Input THD+N Referenced to Full Scale,
A-Weighted)
84 87
dB
Signal-to-Intermodulation Distortion* (CCIF Method)
85 dB
ADC Crosstalk*
Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)
–100
–90 dB
Line to Other
–90 –85 dB
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)
± 10 %
Interchannel Gain Mismatch (Difference of Gain Errors)
ADC Offset Error
DIGITAL-TO-ANALOG CONVERTERS
Parameter
OResolution
Total Harmonic Distortion (THD) LINE_OUT
BSDynamic Range (–60 dB Input THD+N Referenced to Full Scale,
A-Weighted)
OSignal-to-Intermodulation Distortion* (CCIF Method)
Gain Error (Full-Scale Span Relative to Nominal Input Voltage)
LInterchannel Gain Mismatch (Difference of Gain Errors)
EDAC Crosstalk* (Input L, Zero R, Measure LINE_OUT_R; Input R,
Zero L, Measure LINE_OUT_L)
TETotal Out-of-Band Energy (Measured from 0.6 × FS to 20 kHz)*
Min
85
Typ
16
90
85
–40
± 0.5 dB
± 5 mV
Max
0.02
–74
± 10
± 0.5
–80
Units
Bits
%
dB
dB
dB
%
dB
dB
dB
dB
MASTER VOLUME
Parameter
Step Size (0 dB to –46.5 dB)
LINE_OUT_L, LINE_OUT_R, MONO_OUT
Output Attenuation Range Span
Mute Attenuation of 0 dB Fundamental*
Min Typ
1.5
46.5
Max
75
Units
dB
dB
dB
ANALOG OUTPUT
Parameter
Full-Scale Output Voltage
Output Impedance*
External Load Impedance
Output Capacitance*
External Load Capacitance
VREF
VREF Current Drive
VREFOUT
VREFOUT Current Drive
Mute Click (Muted Output Minus Unmuted Midscale DAC Output)*
*Guaranteed, not tested.
Specifications subject to change without notice.
Min
10
2.00
Typ
1
2.83
15
2.25
2.25
±5
Max
800
100
2.50
100
5
Units
V rms
V p-p
Ω
kΩ
pF
pF
V
µA
V
mA
mV
–4– REV. 0
4페이지 AD1819A
tSETUP
BIT_CLK
SYNC
SDATA_OUT
tHOLD
Figure 4. Data Setup and Hold
BIT_CLK
tRISECLK
tFALLCLK
SYNC SLOT 1 SLOT 2
BIT_CLK
SDATA_OUT
WRITE
TO 0x26
DATA
PR4
DON’T
CARE
tS2_PDOWN
SDATA_IN
NOTE: BIT_CLK NOT TO SCALE
Figure 6. AC-Link, Link Low Power Mode Timing
SYNC
tRISESYNC
tFALLSYNC
SDATA_IN
tRISEDIN
tFALLDIN
OSDATA_OUT
BtRISEDOUT
tFALLDOUT
SFigure 5. Signal Rise and Fall Time
RESET
SDATA_OUT
SDATA_IN, BIT_CLK
tSETUP2RST
HI-Z
tOFF
Figure 7. ATE Test Mode
OLABSOLUTE MAXIMUM RATINGS*
EParameter
TEPower Supplies
Min Max
Units
Model
ORDERING GUIDE
Temperature Package
Range
Description
Package
Option*
Analog (AVDD)
–0.3 6.0
V AD1819AJST –40°C to +85°C 48-Terminal TQFP ST-48
Digital (DVDD)
–0.3 6.0
V
Input Current (Except Supply Pins)
± 10.0 mA *ST = Thin Quad Flatpack.
Analog Input Voltage (Signal Pins)
Digital Input Voltage (Signal Pins)
Ambient Temperature (Operating)
Storage Temperature
–0.3
–0.3
–40
–65
AVDD + 0.3 V
DVDD + 0.3 V
+85 °C
+150
°C
*Stresses greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating
TAMB = TCASE – (PD × θCA)
TCASE = Case Temperature in °C
PD = Power Dissipation in W
θCA = Thermal Resistance (Case-to-Ambient)
θJA = Thermal Resistance (Junction-to-Ambient)
θJC = Thermal Resistance (Junction-to-Case)
Package
TQFP
JA
76.2°C/W
JC
17°C/W
CA
59.2°C/W
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD1819A features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–7–
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부품번호 | 상세설명 및 기능 | 제조사 |
AD1819A | AC97 SoundPort Codec | Analog Devices |
AD1819B | AC97 SoundPort Codec | Analog Devices |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |