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WM8983 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 WM8983
기능 Mobile Multimedia CODEC
제조업체 Cirrus Logic
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WM8983 데이터시트, 핀배열, 회로
WM8983
Mobile Multimedia CODEC with 1W Speaker Driver
DESCRIPTION
The WM8983 is a low power, high quality stereo CODEC
designed for portable multimedia applications. Highly flexible
analogue mixing functions enable new application features,
combining hi-fi quality audio with voice communication.
The device integrates preamps for stereo differential mics,
and includes drivers for speaker, headphone and differential
or stereo line output. External component requirements are
reduced as no separate microphone or headphone amplifiers
are required.
Advanced on-chip digital signal processing includes a 5-band
equaliser, a mixed signal Automatic Level Control for the
microphone or line input through the ADC as well as a purely
digital limiter function for record or playback. A programmable
high pass filter in the ADC path is provided for wind noise
reduction and an IIR with programmable coefficients can be
used as a notch filter to suppress fixed-frequency noise.
The WM8983 digital audio interface can operate in master or
slave mode, while an integrated PLL supports flexible clocking
schemes. A-law and -law companding are fully supported.
The WM8983 operates at analogue supply voltages from 2.5V
to 3.3V, although the digital core can operate at voltages
down to 1.71V to save power. Speaker supplies can operate
up to 5V for increased speaker output power. Additional
power management control enables individual sections of the
chip to be powered down under software control.
FEATURES
Stereo CODEC:
DAC SNR 98dB, THD -84dB (‘A’ weighted @ 48kHz)
ADC SNR 95dB, THD -84dB (‘A’ weighted @ 48kHz)
Speaker driver (1W into 8BTL with 5V supply)
- SNR 90dB
- PSRR 80dB
Headphone driver with ‘capless’ option
- 40mW/channel output power into 16/ 3.3V AVDD2
Pop and click suppression
Mic Preamps:
Stereo Differential or mono microphone Interfaces
Programmable preamp gain
Pseudo differential inputs with common mode rejection
Programmable ALC / Noise Gate in ADC path
Low-noise bias supplied for electret microphones
Other Features:
Enhanced 3-D function for improved stereo separation
Highly flexible mixing functions
5-band equaliser (ADC or DAC path)
ADC Programmable high pass filter (wind noise reduction)
ADC Programmable IIR notch filter
Aux inputs for stereo analog input signals or ‘beep’
PLL supporting various clocks between 8MHz-50MHz
Sample rates supported (kHz): 8, 11.025, 16, 12, 16, 22.05,
24, 32, 44.1, 48
2.5V to 3.6V analogue supplies
1.71V to 3.6V digital supplies
2.5V to 5.5V speaker supplies
5x5mm 32-lead QFN package
APPLICATIONS
Multimedia mobile phones
http://www.cirrus.com
Copyright Cirrus Logic, Inc., 20052015
(All Rights Reserved)
Rev 4.5
FEB ‘15




WM8983 pdf, 반도체, 판매, 대치품
WM8983
ADC FILTER RESPONSES .................................................................................................119
HIGHPASS FILTER..............................................................................................................120
5-BAND EQUALISER...........................................................................................................121
APPLICATIONS INFORMATION ............................................................................... 125
RECOMMENDED EXTERNAL COMPONENTS...................................................................125
PACKAGE DIAGRAM ................................................................................................ 126
IMPORTANT NOTICE ................................................................................................ 127
REVISION HISTORY .................................................................................................. 128
4 Rev 4.5

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WM8983 전자부품, 판매, 대치품
WM8983
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or
beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Cirrus tests its package types according to IPC/JEDEC J-STD-020 for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
DBVDD, DCVDD, AVDD1 supply voltages
AVDD2 supply voltage
Voltage range digital inputs
Voltage range analogue inputs
Storage temperature prior to soldering
Storage temperature after soldering
Notes:
MIN MAX
-0.3V
+4.5V
-0.3V
+7V
DGND - 0.3V
DVDD + 0.3V
AGND1 - 0.3V
AVDD1 + 0.3V
AGND2 - 0.3V
AVDD2 + 0.3V
30C max / 85% RH max
-65C
+150C
1. Analogue and digital grounds must always be within 0.3V of each other.
2. All digital and analogue supplies are completely independent from each other.
3. Analogue supply voltages should not be less than digital supply voltages.
4. In non-boosted mode AVDD2 should be AVDD1. In boost mode, AVDD2 should be 1.5 x AVDD1.
5. DBVDD must be greater than or equal to DCVDD.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
Digital supply range (Core)
Digital supply range (Buffer)
Analogue supply range
Speaker supply range
Ground
DCVDD
DBVDD
AVDD1
AVDD2
DGND, AGND1, AGND2
1.71 3.6 V
1.712
3.6 V
2.5 3.6 V
2.5 5.5 V
0V
Notes:
1. Analogue supply voltages should not be less than digital supply voltages.
2. DBVDD should be 1.9V when using the PLL.
Rev 4.5
7

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