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CS496102 데이터시트 PDF




Cirrus Logic에서 제조한 전자 부품 CS496102은 전자 산업 및 응용 분야에서
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부품번호 CS496102 기능
기능 Digital Audio NetworkingProcessor
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CS496102 데이터시트, 핀배열, 회로
CS1810xx, CS4961xxw,ww&.DaCtaMShe-e2t4U.com
Digital Audio Networking Processor
CobraNet
Silicon Series
CS18100x, CS18101x, CS18102x, and CM-2
CS49610x, CS49611x, and CS49612x
Hardware User’s Manual
Version 2.3
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
©Copyright 2005 Cirrus Logic, Inc.
JUN ’05
DS651UM23




CS496102 pdf, 반도체, 판매, 대치품
CobraNet Hardware User’s Manual
List of Figures
List of Figureswww.DataSheet4U.com
Figure 1. CobraNet Data Services ......................................................................................................... 5
Figure 2. CobraNet Interface Hardware Block Diagram......................................................................... 8
Figure 3. Audio Clock Sub-system....................................................................................................... 17
Figure 4. Channel Structure for Synchronous Serial Audio at 64FS (One Sample Period) -
CS18100x/CS49610x & CS18101x/CS49611x ............................................................ 19
Figure 5. Channel Structure for Synchronous Serial Audio at 128FS (One Sample Period) -
CS18102x/CS49612x ................................................................................................... 19
Figure 6. Timing Relationship between FS512_OUT, DAO1_SCLK and FS1..................................... 20
Figure 7. Serial Port Data Timing Overview......................................................................................... 20
Figure 8. Audio Data Timing Detail - Normal Mode, 64FS -
CS18100x/CS49610x, CS18101x/CS49611x .............................................................. 21
Figure 9. Audio Data Timing Detail - Normal Mode, 128FS -
CS18102x/CS49612x ................................................................................................... 21
Figure 10. Audio Data Timing Detail - I2S Mode, 64FS -
CS18100x/CS49610x, CS18101x/CS49611x .............................................................. 21
Figure 11. Audio Data Timing Detail - I2S Mode, 128FS -
CS18102x & CS49612x................................................................................................ 21
Figure 12. Audio Data Timing Detail - Standard Mode, 64FS -
CS18100x/CS49610x, CS18101x/CS49611x .............................................................. 22
Figure 13. Audio Data Timing Detail - Standard Mode, 128FS -
CS18102x/CS49612x ................................................................................................... 22
Figure 14. Host Port Read Cycle Timing - Motorola Mode .................................................................. 25
Figure 15. Host Port Write Cycle Timing - Motorola Mode................................................................... 25
Figure 16. Parallal Control Port - Intel Mode Read Cycle .................................................................... 27
Figure 17. Parallel Control Port - Intel Mode Write Cycle .................................................................... 27
Figure 18. CM-2 Module Assembly Drawing, Top ............................................................................... 38
Figure 19. CM-2 Module Assembly Drawing, Bottom .......................................................................... 39
Figure 20. General PCB Dimensions ................................................................................................... 40
Figure 21. Example Configuration, Side View...................................................................................... 41
Figure 22. Faceplate Dimensions ........................................................................................................ 42
Figure 23. Connector Detail ................................................................................................................. 43
Figure 24. CM-2 RevF Schematic Page 1 of 7 .................................................................................... 44
Figure 25. CM-2 RevF Schematic Page 2 of 7 .................................................................................... 45
Figure 26. CM-2 RevF Schematic Page 3 of 7 .................................................................................... 46
Figure 27. CM-2 RevF Schematic Page 4 of 7 .................................................................................... 47
Figure 28. CM-2 RevF Schematic Page 5 of 7 .................................................................................... 48
Figure 29. CM-2 RevF Schematic Page 6 of 7 .................................................................................... 49
Figure 30. CM-2 RevF Schematic Page 7 of 7 .................................................................................... 50
Figure 31. 144-Pin LQFP Package Drawing ........................................................................................ 51
Figure 32. Device Part Numbering Explanation ................................................................................... 53
4
©Copyright 2005 Cirrus Logic, Inc.
DS651UM23
Version 2.3

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CS496102 전자부품, 판매, 대치품
CobraNet Hardware User’s Manual
Features
2.3 Host Interface
www.DataSheet4U.com
• 8-bit Data, 4-bit Address
• Virtual 24-bit Addressing with 32-bit Data
Polled, Interrupt, and DMA Modes of Operation
• Configure and Monitor CobraNet Interface
• Transmit or Receive Ethernet Packets at Near-100-Mbit Wire Speed
2.4 Asynchronous Serial Interface
• Full-duplex Capable
• 8-bit Data Format
• Supports all Standard Baud Rates
2.5 Synchronous Serial Audio Interface
• Up to Four Bi-directional Interfaces Supporting up to 32 Channels of Audio I/O
• 64FS (3.072 MHz) Bit Rate for CS18100x/CS49610x and CS18101x/
CS49611x
• 128FS (6.144 MHz) Bit Rate for CS18102x/CS49612x
• Accommodates Many Synchronous Serial Formats Including I2S
• 32-bit Data Resolution on All Audio I/O
2.6 Audio Clock Interface
• 5 Host Audio-clocking Modes for Maximum Flexibility in Digital Audio Interface
Design
• Low-jitter Master Audio Clock Oscillator (24.576 MHz)
• Synchronize to Supplied Master and/or Sample Clock
• Sophisticated jitter attenuation assures network perturbations do not affect
audio performance.
2.7 Audio Routing and Processing
• Single-channel Granularity in Routing From Synchronous Serial Audio
Interface to CobraNet Network
• Two levels of inward audio routing affords flexibility in audio I/O interface design
in the host system.
• Local Audio Loopback and Output Duplication Capability
• Peak-read Audio Metering with Ballistics
DS651UM23
Version 2.3
©Copyright 2005 Cirrus Logic, Inc.
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부품번호상세설명 및 기능제조사
CS496102

Digital Audio NetworkingProcessor

Cirrus Logic
Cirrus Logic

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