82579 Datasheet PDF - Intel
| Part Number | 82579 | |
| Description | Gigabit Ethernet PHY | |
| Manufacturers | Intel | |
| Logo |  |
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There is a preview and 82579 download ( pdf file ) link at the bottom of this page. Total 30 Pages | ||
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Intel® 82579 Gigabit Ethernet PHY
Datasheet v2.1
Product Features
General
Security & Manageability
— 10 BASE-T IEEE 802.3 specification
— Intel® vPro support with appropriate Intel
conformance
chipset componnets (82579LM SKU)
— 100 BASE-TX IEEE 802.3 specification
— MACSec support1
conformance
Performance
— 1000 BASE-T IEEE 802.3 specification
— Jumbo Frames (up to 9 kB)2
conformance
— 802.1Q & 802.1p
— Energy Efficient Ethernet (EEE) IEEE
— Receive Side Scaling (RSS)
802.3az support [Low Power Idle (LPI)
mode]
— Two Queues (Tx & Rx)
— IEEE 802.3u auto-negotiation conformance Power
— Supports carrier extension (half duplex)
— Flexible power configuration: use either the
— Loopback modes for diagnostics
— Advanced digital baseline wander correction
PCH 1.05 Vdc or iSVR.
— Reduced power consumption during normal
operation and power down modes
— Automatic MDI/MDIX crossover at all
speeds of operation
— Integrated Intel® Auto Connect Battery
Saver (ACBS)
— Automatic polarity correction
— Single-pin LAN Disable for easier BIOS
— MDC/MDIO management interface
implementation
— Flexible filters in PHY to reduce integrated
LAN controller power
— Fully integrated Switching Voltage
Regulator (iSVR)
— Smart speed operation for automatic speed
— Low Power LinkUp (LPLU)
reduction on faulty cable plants
MAC/PHY Interconnect
— PMA loopback capable (no echo cancel)
— PCIe-based interface for active state
— 802.1as/1588 conformance
operation (S0 state)
— Intel® Stable Image Platform Program
(SIPP)
— SMBus-based interface for host and
management traffic (Sx low power state)
— iSCSI Boot
— Network proxy/ARP Offload support
Package/Design
— 48-pin package, 6 x 6 mm with a 0.4 mm
lead pitch and an Exposed Pad* for ground
— Three configurable LED outputs
— Integrated MDI interface termination
resistors to reduce BOM costs
— Reduced BOM cost by sharing SPI flash with
PCH
1. MACSec is not compatible with Intel® Active Management Technology
2. Jumbo Frames are not compatible with MACSec.
Reference Number: 324990-007
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Datasheet — Intel® 82579 Gigabit Ethernet PHY
16.36 Troubleshooting Common Physical Layout Issues ................................................. 265
16.37 Power Delivery................................................................................................ 266
16.38 82579 Power Sequencing ................................................................................. 267
17 Design Considerations and Guidelines (Mobile Designs) ........................................ 268
17.1 PHY Overview ................................................................................................. 269
17.2 Platform LAN Design Guidelines......................................................................... 272
17.3 PCH – SMBus/PCIe LOM Design Guidelines.......................................................... 281
17.4 SMBus Design Considerations ........................................................................... 282
17.5 General Layout Guidelines ................................................................................ 283
17.6 Layout Considerations...................................................................................... 283
17.7 Guidelines for Component Placement ................................................................. 283
17.8 MDI Differential-Pair Trace Routing for LAN Design .............................................. 286
17.9 Signal Trace Geometry..................................................................................... 286
17.10 Trace Length and Symmetry ............................................................................. 288
17.11 Impedance Discontinuities ................................................................................ 289
17.12 Reducing Circuit Inductance.............................................................................. 289
17.13 Signal Isolation ............................................................................................... 289
17.14 Power and Ground Planes ................................................................................. 290
17.15 Traces for Decoupling Capacitors ....................................................................... 292
17.16 Ground Planes under a Magnetics Module ........................................................... 292
17.17 Light Emitting Diodes....................................................................................... 294
17.18 Considerations for Layout ................................................................................. 294
17.19 Frequency Control Device Design Considerations ................................................. 295
17.20 Crystals and Oscillators .................................................................................... 295
17.21 Quartz Crystal ................................................................................................ 295
17.22 Fixed Crystal Oscillator..................................................................................... 296
17.23 Crystal Selection Parameters ............................................................................ 296
17.24 Vibrational Mode ............................................................................................. 296
17.25 Nominal Frequency .......................................................................................... 296
17.26 Frequency Tolerance........................................................................................ 297
17.27 Temperature Stability and Environmental Requirements ....................................... 297
17.28 Calibration Mode ............................................................................................. 297
17.29 Load Capacitance ............................................................................................ 298
17.30 Shunt Capacitance........................................................................................... 298
17.31 Equivalent Series Resistance............................................................................. 298
17.32 Drive Level ..................................................................................................... 299
17.33 Aging............................................................................................................. 299
17.34 Reference Crystal ............................................................................................ 299
17.35 Oscillator Support............................................................................................ 300
17.36 Oscillator Placement and Layout Recommendations.............................................. 301
17.37 LAN Switch..................................................................................................... 302
17.38 Troubleshooting Common Physical Layout Issues ................................................. 302
17.39 Power Delivery................................................................................................ 303
17.40 Power Sequencing .......................................................................................... 304
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| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ 82579.PDF Datasheet ] | |
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