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SSF5NS65UD PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 SSF5NS65UD
기능 N-Channel MOSFET
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SSF5NS65UD 데이터시트, 핀배열, 회로
Main Product Characteristics:
VDSS
RDS(on)
650V
0.74Ω (typ.)
ID 5A
Features and Benefits:
TO-252 (DPAK)
High dv/dt and avalanche capabilities
100% avalanche tested
Low input capacitance and gate charge
Low gate input resistance
SSF5NS65UD
Marking and pin
Assignment
Schematic diagram
Description:
The SSF5NS65UD series MOSFETs is a new technology, which combines an innovative super
junction technology and advance process. This new technology achieves low Rdson, energy saving,
high reliability and uniformity, superior power density and space saving.
Absolute max Rating:
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VDS
VGS
EAS
IAR
TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Drain-Source Voltage
Gate-to-Source Voltage
Single Pulse Avalanche Energy @ L=22.4mH
Avalanche Current @ L=22.4mH
Operating Junction and Storage Temperature Range
Max.
5
3.2
15
50
0.4
650
± 30
54
2.2
-55 to +150
Units
A
W
W/°C
V
V
mJ
A
°C
©Silikron Semiconductor CO.,LTD.
2013.02.20
www.silikron.com
Version : 1.0
page 1 of 8




SSF5NS65UD pdf, 반도체, 판매, 대치품
Typical electrical and thermal characteristics
SSF5NS65UD
Figure 1: Typical Output Characteristics
Figure 2. Gate to source cut-off voltage
Figure 3. Drain-to-Source Breakdown Voltage Vs.
Case Temperature
Figure 4: Normalized On-Resistance Vs. Case
Temperature
©Silikron Semiconductor CO.,LTD.
2013.02.20
www.silikron.com
Version : 1.0
page 4 of 8

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SSF5NS65UD 전자부품, 판매, 대치품
Ordering and Marking Information
Device Marking: SSF5NS65UD
Package (Available)
TO-252(DPAK)
Operating Temperature Range
C : -55 to 150 ºC
SSF5NS65UD
Devices per Unitoptions
Package
Type
Units/Tape Tapes/Inner
Box
TO-252
TO-252
TO-252
2500
2500
800
2
1
5
Units/Inner
Box
5000
2500
4000
Inner
Boxes/Carton
Box
7
10
8
Units/Carton
Box
35000
25000
32000
Reliability Test Program
Test Item
High
Temperature
Reverse
Bias(HTRB)
High
Temperature
Gate
Bias(HTGB)
Conditions
Tj=125to 150@
80% of Max
VDSS/VCES/VR
Tj=150@ 100% of
Max VGSS
Duration
168 hours
500 hours
1000 hours
Sample Size
3 lots x 77 devices
168 hours 3 lots x 77 devices
500 hours
1000 hours
©Silikron Semiconductor CO.,LTD.
2013.02.20
www.silikron.com
Version : 1.0
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