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PDF PHP8N50 Data sheet ( Hoja de datos )

Número de pieza PHP8N50
Descripción PowerMOS transistor
Fabricantes Philips 
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Philips Semiconductors
PowerMOS transistor
Product specification
PHP8N50
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope featuring high
avalanche energy capability, stable
off-state characteristics, fast
switching and high thermal cycling
performance with low thermal
resistance. Intended for use in
Switched Mode Power Supplies
(SMPS), motor control circuits and
general purpose switching
applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state resistance
MAX.
500
8.8
147
0.8
UNIT
V
A
W
PINNING - TO220AB
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
PIN CONFIGURATION
tab
1 23
SYMBOL
d
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
ID Continuous drain current
IDM
PD
PD/Tmb
VGS
EAS
IAS
Pulsed drain current
Total dissipation
Linear derating factor
Gate-source voltage
Single pulse avalanche
energy
Peak avalanche current
Tj, Tstg
Operating junction and
storage temperature range
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
Tmb = 25 ˚C
Tmb > 25 ˚C
VDD 50 V; starting Tj = 25˚C; RGS = 50 ;
VGS = 10 V
VDD 50 V; starting Tj = 25˚C; RGS = 50 ;
VGS = 10 V
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
8.7
5.5
35
147
1.176
± 30
510
8
150
UNIT
A
A
A
W
W/K
V
mJ
A
˚C
THERMAL RESISTANCES
SYMBOL
Rth j-mb
Rth j-a
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
MIN. TYP. MAX. UNIT
- - 0.85 K/W
- 60 - K/W
February 1997
1
Rev 1.000

1 page




PHP8N50 pdf
Philips Semiconductors
PowerMOS transistor
Product specification
PHP8N50
VGS, Gate-Source voltage (Volts)
15
ID = 8 A
Tj = 25 C
250 V
100 V
10
PHP8N50
VDD = 400 V
5
0
0 50 100 150
Qg, Gate charge (nC)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Switching times (ns)
1000
VDD = 250 V
VGS = 10 V
RD = 31 Ohms
ID = 8 A
Tj = 25 C
100 td(off)
tf
tr
PHP8N50
td(on)
10
0 10 20 30 40 50
RG, Gate resistance (Ohms)
Fig.14. Typical switching times.
td(on), tr, td(off), tf = f(RG)
60
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100
-50 0 50 100
Tj, Junction temperature (C)
150
Fig.15. Normalised drain-source breakdown voltage.
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
20 IF, Source-Drain diode current (Amps)
VGS = 0 V
15
PHP8N50
10
150 C
Tj = 25 C
5
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
VSDS, Source-Drain voltage (Volts)
Fig.16. Source-Drain diode characteristic.
IF = f(VSDS); parameter Tj
EAS, Normalised unclamped inductive energy (%)
120
110
100
90
80
70
60
50
40
30
20
10
0
20 40 60 80 100 120 140
Starting Tj ( C)
Fig.17. Normalised unclamped inductive energy.
EAS% = f(Tj)
VGS
0
RGS
L
VDS
T.U.T.
+ VDD
-
-ID/100
R 01
shunt
Fig.18. Unclamped inductive test circuit.
EAS = 0.5 LID2 V(BR)DSS/(V(BR)DSS VDD)
February 1997
5
Rev 1.000

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