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NB3H63143G 데이터시트 PDF




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부품번호 NB3H63143G 기능
기능 Programmable Clock Generator
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NB3H63143G 데이터시트, 핀배열, 회로
NB3H63143G
Programmable Clock
Generator with Single Ended
(LVCMOS/LVTTL) and
Differential (LVPECL/LVDS/
HCSL/CML) Outputs
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The NB3H63143G is a one−time programmable (OTP), low power
PLL−based clock generator that supports any output frequency from
8 kHz to 200 MHz. The device accepts fundamental mode parallel
resonant crystal or a single ended (LVCMOS/LVTTL) reference clock
as input. It generates either three single ended (LVCMOS/LVTTL)
1
QFN16
CASE 485AE
outputs, or one single ended output and one differential
(LVPECL/LVDS/HCSL/CML) output. The output signals can be
MARKING DIAGRAM
modulated using the spread spectrum feature of the PLL
(programmable spread spectrum type, deviation and rate) for
applications demanding low electromagnetic interference (EMI).
Individual output enable pins OE[2:0] are available to enable/disable
3H631
43Gxx
ALYWG
G
the outputs. Individual output voltage pins VDDO[2:0] are available
to independently set the output voltage of each output. Up to four
different configurations can be written into the device memory. Two
selection pins (SEL[1:0]) allow the user to select the configuration to
use. Using the PLL bypass mode, it is possible to get a copy of the
input clock on any or all of the outputs. The device can be powered
down using the Power Down pin (PD#). It is possible to program the
internal input crystal load capacitance and the output drive current
3H63143G
xx
A
L
Y
W
G
= Specific Device Code
= Specific Program Code (Default
‘00’ for Unprogrammed Part)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
provided by the device. The device also has automatic gain control
(Note: Microdot may be in either location)
(crystal power limiting) circuitry which avoids the device overdriving
the external crystal.
Features
ORDERING INFORMATION
See detailed ordering and shipping information on page 23 of
this data sheet.
Operating Power Supply: 3.3 V ±10%, 2.5 V ±10%
I/O Standards
Programmable Output Drive Current for Single Ended
Inputs: LVCMOS/LVTTL, Fundamental Mode
Outputs
Crystal
Outputs: 1.8 V to 3.3 V LVCMOS/LVTTL
Outputs: LVPECL, LVDS, HCSL and CML
3 Programmable Single Ended (LVCMOS/LVTTL)
Outputs from 8 kHz to 200 MHz
1 Programmable Differential Clock Output up to
200 MHz
Input Frequency Range
Crystal: 3 MHz to 50 MHz
Power Saving Mode through Power Down Pin
Programmable PLL Bypass Mode
Programmable Output Inversion
Programming and Evaluation Kit Available for Field
Programming and Quick Evaluation
Temperature Range −40°C to 85°C
Packaged in 16−pin QFN
These are Pb−Free Devices
Reference Clock: 3 MHz to 200 MHz
Configurable Spread Spectrum Frequency Modulation
Typical Applications
eBooks and Media Players
Parameters (Type, Deviation, Rate)
Individual Output Enable Pins
Independent Output Voltage Pins
Smart Wearables, Smart Phones, Portable Medical and
Industrial Equipment
Set Top Boxes, Printers, Digital Cameras and
Programmable Internal Crystal Load Capacitors
Camcorders
© Semiconductor Components Industries, LLC, 2015
October, 2015 − Rev. 2
1
Publication Order Number:
NB3H63143G/D




NB3H63143G pdf, 반도체, 판매, 대치품
NB3H63143G
FUNCTIONAL DESCRIPTION
The NB3H63143G is a 3.3 V/2.5 V programmable, single
ended/differential clock generator, designed to meet the
timing requirements for consumer and portable markets. It
has a small package size and it requires low power during
operation and while in standby. This device provides the
ability to configure a number of parameters as detailed in the
following section. The One−Time Programmable memory
allows programming and storing of up to four configurations
in the memory space.
3.3 V/2.5 V
VDDO0 VDDO1
R (Optional)
R (Optional)
R (Optional)
0.1 mF
0.01 mF
0.1 mF
0.01 mF
0.1 mF
0.01 mF
Crystal or
Reference
Clock Input
VDD
XIN/CLKIN
VDDO0
VDDO1
VDDO2
R (Optional)
XOUT
NB3H63143G
VDDO2
0.1 mF
0.01 mF
SEL0
SEL1
PD# OE0 OE1 OE2
CLK2
CLK1
CLK0
Single Ended Clock
Single Ended Clocks
or
Differential Clock
LVPECL/LVDS/
HCSL/CML
Figure 3. Power Supply and Output Supply Noise Suppression
Power Supply
Device Supply
The NB3H63143G is designed to work with a 3.3 V/2.5 V
VDD power supply. For VDD operation of 1.8 V, refer to the
NB3V63143G datasheet. In order to suppress power supply
noise it is recommended to connect decoupling capacitors of
0.1 mF and 0.01 mF close to the VDD pin as shown in
Figure 3.
Output Power Supply
Each output CLK[2:0] has a separate output power supply
VDDO[2:0] pin to control its output voltage. The output
power supply can be as high as VDD. It can be as low as
2.5 V for clock output types LVPECL/CML and as low as
1.8 V if using other clock output types. This feature removes
the need for external voltage converters for each of the
outputs thus reducing component count, saving board space
and facilitating board design. In order to suppress power
supply noise it is recommended to connect decoupling
capacitors of 0.1 mF and 0.01 mF close to each VDDO pin as
shown in Figure 3.
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NB3H63143G 전자부품, 판매, 대치품
NB3H63143G
Output Enable/Disable
Output Enable pins (OE[2:0]) are LVCMOS/LVTTL
input pins that individually enable or disable the outputs
CLK[2:0] respectively. These inputs only disable the output
buffers thus not affecting the rest of the blocks on the device.
When using a differential output, only the OE1 pin must be
used to enable/disable the differential output (the OE0 pin
will be ignored). The hardware OE pins have an effect only
when the respective outputs are enabled in the configuration
space. The output disable state can be set to high impedance
(Hi−Z) or Low.
Power Down
Power saving mode can be activated though the power
down PD# input pin. This input is an LVCMOS/LVTTL
active Low Master Reset that disables the device and sets the
outputs Low. By default it has an internal pull−down resistor.
The device functions are disabled by default and when the
PD# pin is pulled high the device functions are activated.
Default Device State
The NB3H63143G parts shipped from
ON Semiconductor are blank, with no inputs/outputs
programmed. The parts need to be programmed by the field
sales or by a distributor or by the users themselves before
they can be used. Programmable clock software
downloadable from the ON Semiconductor website can be
used along with the programming kit to achieve this
purpose. For mass production, parts can be factory
programmed with a customer qualified configuration and
sourced from ON Semiconductor as a dash part number (Eg.
NB3H63143G−01).
Table 7. ATTRIBUTES
Characteristic
ESD Protection − Human Body Model
Internal Input Default State Pull Up/Down Resistor
Moisture Sensitivity, Indefinite Time Out of Dry Pack
(Note 1)
Flammability Rating − Oxygen Index: 28 to 34
Transistor Count
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
2 kV
50 kW
MSL1
UL 94 V−0 @ 0.125in
130k
ABSOLUTE MAXIMUM RATINGS (Note 2)
Symbol
Parameter
Rating
Unit
VDD
Positive Power Supply with Respect to Ground
−0.5 to +4.6
V
VI
TA
TSTG
TSOL
qJA
Input Voltage with Respect to Chip Ground
Operating Ambient Temperature Range (Industrial Grade)
Storage Temperature
Max. Soldering Temperature (10 sec)
Thermal Resistance (Junction−to−Ambient) (Note 3)
0 lfpm
500 lfpm
−0.5 to VDD + 0.5
−40 to +85
−65 to +150
265
32.3
24.22
V
°C
°C
°C
°C/W
°C/W
qJC Thermal Resistance (Junction−to−Case)
3.6 °C/W
TJ Junction Temperature
125 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and not valid simultaneously.
If stress limits are exceeded device functional operation is not implied, damage may occur and reliability may be affected.
3. JEDEC standard multilayer board − 2S2P (2 signal, 2 power). JESD51.7 type board. Back side Copper heat spreader area 100 sqmm, 2 oz
(0.070mm) copper thichness.
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부품번호상세설명 및 기능제조사
NB3H63143G

Programmable Clock Generator

ON Semiconductor
ON Semiconductor

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