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PEX8624 데이터시트 PDF




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부품번호 PEX8624 기능
기능 PCI Express switching
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PEX8624 데이터시트, 핀배열, 회로
Version 1.0 2009
Features
ƒ PEX 8624 Vitals
o 24-lane, 6-port PCIe Gen2 switch
- Integrated 5.0 GT/s SerDes
o 19 x 19mm2, 324-pin FCBGA package
o Typical Power: 1.9 Watts
ƒ PEX 8624 Key Features
o Standards Compliant
- PCI Express Base Specification, r2.0
(backwards compatible w/ PCIe r1.0a/1.1)
- PCI Power Management Spec, r1.2
- Microsoft Vista Compliant
- Supports Access Control Services
- Dynamic link-width control
- Dynamic SerDes speed control
o High Performance
- Non-blocking switch fabric
- Full line rate on all ports
- Packet Cut-Thru with 160ns max packet
latency (x8 to x8)
- 2KB Max Payload Size
- Read Pacing (bandwidth throttling)
- Dual-Cast
o Flexible Configuration
- Ports configurable as x1, x2, x4, x8
- Registers configurable with strapping
pins, EEPROM, I2C, or host software
- Lane and polarity reversal
- Compatible with PCIe 1.0a PM
o Dual-Host & Fail-Over Support
- Configurable Non-Transparent port
- Moveable upstream port
- Crosslink port capability
o Quality of Service (QoS)
- Eight traffic classes per port
- Weighted round-robin source
port arbitration
o Reliability, Availability, Serviceability
- 3 Hot Plug Ports with native HP Signals
- All ports hot plug capable thru I2C
(Hot Plug Controller on every port)
- ECRC and Poison bit support
- Data Path parity
- Memory (RAM) Error Correction
- INTA# and FATAL_ERR# signals
- Advanced Error Reporting
- Port Status bits and GPIO available
- Per port error diagnostics
- Performance Monitoring
Per port payload & header counters
PEX 8624
PCIe Gen2, 5.0GT/s 24-lane, 6-port Switch
The ExpressLaneTM PEX 8624 device offers PCI Express switching
capability enabling users to add scalable high bandwidth, non-blocking
interconnection to a wide variety of applications including
workstations, storage systems, and communications platforms. The
PEX 8624 is well suited for fan-out, aggregation, and peer-to-peer
applications.
High Performance & Low Packet Latency
The PEX 8624 architecture supports packet cut-thru with a maximum
latency of 160ns (x8 to x8). This, combined with large packet memory and
non-blocking internal switch architecture, provides full line rate on all ports
for performance-hungry applications such as servers and switch fabrics.
The low latency enables applications to achieve high throughput and
performance. In addition to low latency, the device supports a max payload
size of 2048 bytes, enabling the user to achieve even higher throughput.
Data Integrity
The PEX 8624 provides end-to-end CRC (ECRC) protection and Poison bit
support to enable designs that require end-to-end data integrity. PLX also
supports data path parity and memory (RAM) error correction as packets
pass through the switch.
Flexible Register & Port Configuration
The PEX 8624’s 6 ports can be configured to lane widths of x1, x2, x4, or
x8. Flexible buffer allocation, along with the device's flexible packet flow
control, maximizes throughput for applications where more traffic flows in
the downstream, rather than upstream, direction. Any port can be designated
as the upstream port, which
can be changed dynamically.
x4
x8
The PEX 8624 also provides
several ways to configure its
registers. The device can be
PEX 8624
PEX 8624
configured through strapping
pins, I2C interface, host
software, or an optional
5 x4 x4 x4 x4 x4
serial EEPROM. This allows
for easy debug during the
x8
x8
development phase,
performance monitoring
during the operation phase,
PEX 8624
PEX 8624
and driver or software
upgrade. Figure 1 shows
some of the PEX 8624’s
x8 x4 x4
x8 x8
common port configurations. Figure 1. Common Port Configurations




PEX8624 pdf, 반도체, 판매, 대치품
Software Usage Model
From a system model viewpoint, each PCI Express port
is a virtual PCI to PCI bridge device and has its own set
of PCI Express configuration registers. It is through the
upstream port that the BIOS or host can configure the
other ports using standard PCI enumeration. The virtual
PCI to PCI bridges within the PEX 8624 are compliant
to the PCI and PCI Express system models. The
Configuration Space Registers (CSRs) in a virtual
primary/secondary PCI to PCI bridge are accessible by
type 0 configuration cycles through the virtual primary
bus interface (matching bus number, device number, and
function number).
Interrupt Sources/Events
The PEX 8624 switch supports the INTx interrupt
message type (compatible with PCI 2.3 Interrupt signals)
or Message Signaled Interrupts (MSI) when enabled.
Interrupts/messages are generated by PEX 8624 for hot
plug events, doorbell interrupts, baseline error reporting,
and advanced error reporting.
Development Tools
PLX offers hardware and software tools to enable rapid
customer design activity. These tools consist of a
hardware module (PEX 8624RDK), hardware
documentation (available at www.plxtech.com), and a
Software Development Kit (also available at
www.plxtech.com).
ExpressLane PEX 8624RDK
The PEX 8624RDK is a hardware module containing the
PEX 8624 which plugs right into your system. The
PEX 8624RDK can be used to test and validate customer
software, or used as an evaluation vehicle for PEX 8624
features and benefits. The PEX 8624RDK provides
everything that a user needs to get their hardware and
software development started.
Software Development Kit (SDK)
PLX’s Software Development Kit is available for
download at www.plxtech.com/sdk. The software
development kit includes drivers, source code, and GUI
interfaces to aid in configuring and debugging the
PEX 8624.
PLX Technology, Inc.
870 Maude Ave.
Sunnyvale, CA 94085 USA
www.plxtech.com
Product Ordering Information
Part Number
PEX8624-BB50BC
PEX8624-BB50BC F
PEX8624-BB RDK
Description
24-Lane, 6-Port PCI Express Switch (19x19mm2)
24-Lane, 6-Port PCI Express Switch, Pb-Free (19x19mm2)
PEX 8624 Rapid Development Kit
Please visit the PLX Web site at http://www.plxtech.com or contact PLX sales at 408-774-9060 for sampling.
© 2009 PLX Technology, Inc. All rights reserved. PLX and the PLX logo are registered trademarks of PLX Technology, Inc. ExpressLane is a trademark of PLX Technology,
Inc., which may be registered in some jurisdiction. All other product names that appear in this material are for identification purposes only and are acknowledged to be
trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and reliable, but PLX Technology, Inc. assumes no
responsibility for any errors that may appear in this material. PLX Technology, Inc. reserves the right, without notice, to make changes in product design or specification.
PEX8624-SIL-PB-1.0
04/09

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PEX8624

PCI Express switching

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