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IS46DR32160C 데이터시트 PDF




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부품번호 IS46DR32160C 기능
기능 16Mx32 512Mb DDR2 DRAM
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IS46DR32160C 데이터시트, 핀배열, 회로
IS43/46DR32160C
16Mx32
512Mb DDR2 DRAM
FEATURES
Vdd = 1.8V ±0.1V, Vddq = 1.8V ±0.1V
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Double data rate interface: two data transfers
per clock cycle
Differential data strobe (DQS, DQS)
4-bit prefetch architecture
On chip DLL to align DQ and DQS transitions
with CK
4 internal banks for concurrent operation
Programmable CAS latency (CL) 3, 4, 5, and 6
supported
Posted CAS and programmable additive latency
(AL) 0, 1, 2, 3, 4, and 5 supported
WRITE latency = READ latency - 1 tCK
Programmable burst lengths: 4 or 8
Adjustable data-output drive strength, full and
reduced strength options
On-die termination (ODT)
OPTIONS
Configuration:
16M x 32 (IS43/46DR32160C - 8K refresh)
Package: x32: 126-ball WBGA
Timing – Cycle time
2.5ns @CL=6, DDR2-800E
3.0ns @CL=5, DDR2-667D
3.75ns @CL=4, DDR2-533C
5.0ns @CL=3, DDR2-400B
Temperature Range:
Commercial (0°C Tc 85°C; 0°C Ta 70°C)
Industrial (–40°C Tc 95°C; –40°C Ta 85°C)
Automotive, A1 (–40°C Tc 95°C; –40°C Ta 85°C)
Automotive, A2 (–40°C Tc 105°C; –40°C Ta 105°C)
Tc = Case Temp, Ta = Ambient Temp
NOVEMBER 2013
DESCRIPTION
ISSI's 512Mb DDR2 SDRAM uses a double-data-rate
architecture to achieve high-speed operation. The
double-data rate architecture is essentially a 4n-prefetch
architecture, with an interface designed to transfer two
data words per clock cycle at the I/O balls.
The 512Mb DDR2 SDRAM is provided in a wide bus
x32 format, designed to offer a smaller footprint and
support compact designs.
ADDRESS TABLE
Parameter
Configuration
Refresh Count
Row Addressing
Column
Addressing
Bank Addressing
Precharge
Addressing
16M x 32
4M x 32 x 4 banks
8K/64ms
A0-A12
A0-A8
BA0, BA1
A10/AP
KEY TIMING PARAMETERS
Speed Grade -25E -3D -37C
tRCD
15 15 15
tRP 15 15 15
tRC 60 60 60
tRAS
45 45 45
tCK @CL=3
555
tCK @CL=4
3.75 3.75 3.75
tCK @CL=5
3 3 3.75
tCK @CL=6
2.5 3 3.75
-5B
15
15
55
40
5
5
5
5
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest
version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com 1
Rev. A
11/11/2013




IS46DR32160C pdf, 반도체, 판매, 대치품
IS43/46DR32160C
Symbol
DQ0-31
DQS, (DQS)
(DQS 0-3,
DQS 0-3)
NC
VDDQ
VSSQ
VDDL
VSSDL
VDD
VSS
VREF
Type
Input/
Output
Input/
Output
Function
Data Input/Output: Bi-directional data bus.
Data Strobe: output with read data, input with write data. Edge-aligned with read data,
centered in write data. The data strobes DQS(n) may be used in single ended mode
or paired with optional complementary signals DQS(n) to provide differential pair
signaling to the system during both reads and writes. A control bit at EMR(1)[A10]
enables or disables all complementary data strobe signals.
DQS0 corresponds to the data on DQ0-DQ7
DQS1 corresponds to the data on DQ8-DQ15
DQS2 corresponds to the data on DQ16-DQ23
DQS3 corresponds to the data on DQ24-DQ31
Supply
Supply
Supply
Supply
Supply
Supply
Supply
No Connect: No internal electrical connection is present.
DQ Power Supply: 1.8 V +/- 0.1 V
DQ Ground
DLL Power Supply: 1.8 V +/- 0.1 V
DLL Ground
Power Supply: 1.8 V +/- 0.1 V
Ground
Reference voltage
4 Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
11/11/2013

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IS46DR32160C 전자부품, 판매, 대치품
IS43/46DR32160C
Operating Temperature Condition
Symbol Parameter
Rating (1,2,3)
Commercial Temperature
Tc = 0 to +85
Ta = 0 to +70
TOPER
Industrial Temperature,
Automotive Temperature (A1)
Tc = -40 to +95
Ta = -40 to +85
Automotive Temperature (A2)
Tc = -40 to +105
Ta = -40 to +105
Notes:
1. Tc = Operating case temperature at center of package
2. Ta = Operating ambient temperature immediately above package center.
3. Both temperature specifications must be met.
Units
oC
oC
oC
oC
oC
oC
Thermal Resistance:
Package
126-ball BGA
Substrate
4-layer
Theta-ja
(Airflow = 0m/s)
35.7
Theta-ja
(Airflow = 1m/s)
26.1
Theta-ja
(Airflow = 2m/s)
24.0
Theta-jc
2.9
Units
C/W
ODT DC Electrical Characteristics
PARAMETER/CONDITION
SYMBOL MIN NOM MAX UNITS NOTES
Rtt effective impedance value for EMRS(1)[A6,A2]=0,1; 75 Ω Rtt1(eff) 60 75 90
Ω
1
Rtt effective impedance value for EMRS(1)[A6,A2]=1,0; 150 Ω Rtt2(eff) 120 150 180
Ω
1
Rtt effective impedance value for EMRS(1)[A6,A2]=1,1; 50 Ω Rtt3(eff) 40 50 60
Ω
1
Deviation of VM with respect to VDDQ/2
ΔVM
-6
+6 %
1
Notes:
1. Test condition for Rtt measurements
Measurement Definition for Rtt(eff): Apply VIH (ac) and VIL (ac) to test pin separately, then measure current I(VIH (ac)) and I( VIL
(ac)) respectively. VIH (ac), VIL (ac), and VDDQ values defined in SSTL_18
Rtt (eff) Vih (ac) - Vil (ac)
I(Vih (ac)) - I(Vil (ac))
Measurement Definition for VM: Measure voltage (VM) at test pin (midpoint) with no load.
ΔVM = [(2 x VM / VDDQ) - 1] x 100%
Integrated Silicon Solution, Inc. — www.issi.com 7
Rev. A
11/11/2013

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16Mx32 512Mb DDR2 DRAM

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