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PDF AKD5380 Data sheet ( Hoja de datos )
| Número de pieza | AKD5380 | |
| Descripción | 96kHz 24Bit ADC | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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ASAHI KASEI
[AK5380]
AK5380
96kHz 24Bit ∆Σ ADC with Single–ended Input
GENERAL DESCRIPTION
The AK5380 is a stereo A/D Converter with wide sampling rate of 4kHz∼96kHz and is suitable for High-
end audio system. The AK5380 achieves high accuracy and low cost by using Enhanced dual bit ∆Σ
techniques. The AK5380 requires no external components because the analog inputs are single-ended.
The audio interface has two formats (MSB justified, I2S) and can correspond to many systems like music
instrument and AV receiver.
FEATURES
o Stereo ∆Σ ADC
o On-Chip Digital Anti-Alias Filtering
o Single-ended Input
o Digital HPF for DC-Offset cancel
o S/(N+D): 96dB@5V for 48kHz
o DR:
106dB@5V for 48kHz
o S/N:
106dB@5V for 48kHz
o Sampling Rate Ranging from 4kHz to 96kHz
o Master Clock:
256fs/384fs/512fs/768fs (∼48kHz)
256fs/384fs
(∼96kHz)
o Input level: TTL/CMOS selectable
o Output format: 24bit MSB justified / I2S selectable
o Power Supply: 4.5∼5.5V (VA)
2.7∼5.5V (VD at 48kHz)
4.5∼5.5V (VD at 96kHz)
o Ta=-40∼85°C
o Small 16pin TSSOP Package
o AK5353 Pin-compatible
VA AGND VD DGND
MCLK
AINL
AINR
VCOM
∆Σ
Modulator
∆Σ
Modulator
Voltage Reference
Decimation
Filter
Decimation
Filter
Clock Divider
Serial I/O
Interface
LRCK
SCLK
SDTO
TST
PDN
DIF TTL
MS0100-E-01
-1-
2001/7
1 page  
ASAHI KASEI
[AK5380]
ANALOG CHARACTERISTICS
(Ta=25°C; VA,VD=5V; fs=48kHz; I/F format=Mode 0; Signal Frequency =1kHz;
Measurement band width=20Hz∼20kHz; BW=40Hz∼40kHz at fs=96kHz; unless otherwise specified)
Parameter
min typ max
ADC Analog Input Characteristics:
Resolution
24
S/(N+D) (-1dBFS) (Note 4) fs=48kHz
88 96
fs=96kHz
82 90
DR (-60dBFS) (Note 5) fs=48kHz, A-weighted
100 106
fs=96kHz
94 102
S/N
fs=48kHz, A-weighted
100 106
fs=96kHz
94 102
Interchannel Isolation
90 110
DC Accuracy
Interchannel Gain Mismatch
0.1 0.5
Gain Drift
100 150
Input Voltage
(Note 6)
fs=48kHz
2.8 3.0 3.2
fs=96kHz
3.0 3.2 3.4
Input Resistance
(Note 7)
10
15
Power Supply Rejection
(Note 8)
-
50
Power Supplies
Power Supply Current (VA+VD)
Normal Operation (PDN= “H”, fs=48kHz) (Note 9)
24 36
Normal Operation (PDN= “H”, fs=96kHz) (Note 9)
30 45
Power-Down Mode (PDN= “L”)
10 100
Units
Bits
dB
dB
dB
dB
dB
dB
dB
dB
ppm/°C
Vpp
Vpp
kΩ
dB
mA
mA
µA
Notes:
4. The ratio of the rms value of the signal to the rms sum of all the spectral components less than 20kHz bandwidth,
including distortion components.
5. S/(N+D) which is measured with an input signal of -60dB below full-scale.
6. This value is the full scale(0dB) of the input voltage. Input voltage is proportional to VA. (Vin=0.6xVA)
7. 9kΩ(typ) and 6kΩ(min) at fs=96kHz.
8. PSR is applied to VA,VD with 1kHz, 50mVpp.
9. VA=16mA(typ); VD=8mA(typ)@48kHz&5V, 5mA(typ)@48kHz&3V, 14mA(typ)@96kHz&5V.
MS0100-E-01
-5-
2001/7
5 Page 
ASAHI KASEI
[AK5380]
OPERATION OVERVIEW
n System Clock Input
The external clocks which are required to operate the AK5380 are MCLK(256fs/384fs/512fs/768fs), LRCK(1fs), SCLK.
MCLK should be synchronized with LRCK but the phase is not critical. When 384fs, 512fs or 768fs clock is input to
MCLK pin, the internal master clock becomes 256fs(=384fs x 2/3=512fs x 1/2=768fs x 1/3). Table 1 illustrates standard
audio word rates and corresponding frequencies used in the AK5380.
All external clocks (MCLK,BICK,LRCK) should always be present whenever the AK5380 is in normal operation mode
(PDN = “H”). If these clocks are not provided, the AK5380 may draw excess current and may not possibly operate
properly because the device utilizes dynamic refreshed logic internally. If the external clocks are not present, the AK5380
should be in the power-down mode (PDN = “L”). After exiting reset at power-up etc., the AK5380 is in the power-down
mode until MCLK and LRCK are input.
fs
32.0kHz
44.1kHz
48.0kHz
96.0kHz
256fs
8.1920MHz
11.2896MHz
12.2880MHz
24.5760MHz
MCLK
384fs
512fs
12.2880MHz 16.3840MHz
16.9344MHz 22.5792MHz
18.4320MHz 24.5760MHz
36.8640MHz
N/A
768fs
24.576MHz
33.8688MHz
36.8640MHz
N/A
SCLK
64fs 128fs
2.0480MHz 4.0960MHz
2.8224MHz 5.6448MHz
3.0720MHz 6.1440MHz
6.1440MHz
N/A
Table 1. Example of System Clock
n Serial Data Interface
Two kinds of data format can be selected by DIF pin. The data is clocked out via the SDTO pin by SCLK corresponding
to the setting of DIF pin. The format of output data is 2’s complement MSB first.
Mode
0
1
DIF Format
0 24bit, MSB justified, L/R, SCLK ≥48fs (16bit, MSB justified, L/R, SCLK=32fs)
1 24bit, I2S,
SCLK ≥48fs (16bit, I2S,
SCLK=32fs)
Table 2. Audio Serial Interface Formats
MS0100-E-01
- 11 -
2001/7
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AKD5380.PDF ] | |
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