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PDF AK4371 Data sheet ( Hoja de datos )
| Número de pieza | AK4371 | |
| Descripción | DAC | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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[AK4371]
AK4371
DAC with built-in PLL & HP-AMP
GENERAL DESCRIPTION
The AK4371 is a 24-bit DAC with an integrated PLL and headphone amplifier. The PLL input frequency is
synchronized to typical mobile phone clock frequencies. The AK4371 features an analog mixing circuit
that allows easy interfacing in mobile phone and portable communication designs. The integrated
headphone amplifier features “pop-noise free” power-on/off, a mute control, and it delivers 40mW of
power into 16Ω. The AK4371 is packaged in a 32-pin QFN (4mm×4mm) package, ideal for portable
applications.
FEATURE
Multi-bit ΔΣ DAC
Sampling Rate
- 8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz and 48kHz
On chip perfect filtering 8 times FIR interpolator
- Passband: 20kHz
- Passband Ripple: ±0.02dB
- Stopband Attenuation: 54dB
Digital De-emphasis Filter: 32kHz, 44.1kHz and 48kHz
System Clock
- PLL Mode (MCKI): 27MHz, 26MHz, 19.8MHz, 19.68MHz, 19.2MHz, 15.36MHz,
14.4MHz, 13MHz, 12MHz and 11.2896MHz
- PLL Mode (BICK or LRCK): 64fs, 32fs or fs
- EXT Mode: 256fs/384fs/512fs/768fs/1024fs
- Input Level: AC Couple Input Available
Audio I/F Format: MSB First, 2’s Complement
- I2S, 24bit MSB justified, 24bit/20bit/16bit LSB justified
- Master/Slave Mode
Digital Mixing: LR, LL, RR, (L+R)/2
Bass Boost Function
Digital ATT
Analog Mixing Circuit: 6 Inputs (Single-ended or Full-differential)
Stereo Lineout
- S/N: [email protected]
- Output Volume: +6 to –24dB (or 0 to –30dB), 2dB step
Mono Hands-free Output
- Output Power: 0.8mW @ 600Ω 3.3V
- Output Volume: +6 to –24dB (or 0 to –30dB), 2dB step
Headphone Amplifier
- Output Power: 40mW x 2ch @16Ω, 3.3V
- S/N: [email protected]
- Pop Noise Free at Power-ON/OFF and Mute
- Output Volume: 0 ~ –63dB & +12/+6/0 dB Gain
1.5dB step (0 ~ –30dB), 3dB step (–30 ~ –63dB)
μP Interface: 3-wire/I2C
Power Supply: 1.6V ∼ 3.6V
Power Supply Current: 3.8mA @1.8V (6.8mW, DAC+HP, No output)
Ta: −30 ∼ 85°C
Small Package: 32pin QFN (4mm x 4mm, 0.4mm pitch)
Register Compatible with AK4368
MS0596-E-00
-1-
2007/04
1 page  
[AK4371]
PIN/FUNCTION
No. Pin Name I/O
Function
1 SDATA
I Audio Serial Data Input Pin
2 BICK
I/O Audio Serial Data Clock Pin
3 LRCK
I/O Input / Output Channel Clock Pin
4 MCKI
I External Master Clock Input Pin
5 DVDD
- Digital Power Supply Pin, 1.6 ∼ 3.6V
6 PVDD
- Power Supply for PLL, 1.6 ∼ 3.6V. Normally connected to AVDD.
7 VCOC
O
Output for Loop Filter of PLL Circuit
This pin should be connected to VSS3 with one resistor and one capacitor in series.
8 VSS2
- Ground Pin
9 VSS3
- Ground Pin
10 MCKO
O Master Clock Output Pin
11
SDA
CDTI
I/O Control Data Input/Output Pin (I2C mode : I2C pin = “H”)
I Control Data Input Pin (3-wire serial mode : I2C pin = “L”)
12
SCL
CCLK
I Control Data Clock Pin (I2C mode : I2C pin = “H”)
I Control Data Clock Pin (3-wire serial mode : I2C pin = “L”)
13
CAD0
CSN
I Chip Address 0 Select Pin (I2C mode : I2C pin = “H”)
I Chip Select Pin (3-wire serial mode : I2C pin = “L”)
Power-down & Reset
14 PDN
I When “L”, the AK4371 is in power-down mode and is held in reset.
The AK4371 should always be reset upon power-up.
15 I2C
I
Control Mode Select Pin
“H”: I2C Bus, “L”: 3-wire Serial
16 MUTET
O
Mute Time Constant Control pin
Connected to VSS1 pin with a capacitor for mute time constant.
17 MOUT
O Mono Signal Output Pin
18 LOUT
O Lch Stereo Line Output Pin
19 ROUT
O Rch Stereo Line Output Pin
20 VREF
O
Reference Voltage Output Pin
Normally connected to VSS1 pin with a 0.22μF electrolytic capacitor.
21 VCOM
O
Common Voltage Output Pin
Normally connected to VSS1 pin with a 2.2μF electrolytic capacitor.
22 AVDD
- Analog Power Supply Pin, 1.6 ∼ 3.6V
23 HVDD
- Power Supply Pin for Headphone Amp, 1.6 ∼ 3.6V
24 VSS1
- Ground Pin
25 HPR
O Rch Headphone Amp Output
26 HPL
O Lch Headphone Amp Output
27 RIN2
I Rch Analog Input 2 Pin
28 LIN2
I Lch Analog Input 2 Pin
29 RIN3
I Rch Analog Input 3 Pin
30 LIN3
I Lch Analog Input 3 Pin
31
RIN1
IN+
I Rch Analog Input 1 Pin (LDIF bit =“0” : Single-ended Input)
I Positive Line Input Pin (LDIF bit =“1” : Full-differential Input)
32
LIN1
IN−
I Rch Analog Input 1 Pin (LDIF bit =“0” : Single-ended Input)
I Negative Line Input Pin (LDIF bit =“1” : Full-differential Input )
Note 1. All digital input pins (I2C, SDA/CDTI, SCL/CCLK, CAD0/CSN, SDATA, LRCK, BICK, MCKI, PDN) must not
be left floating. MCKI pin can be left floating only when PDN pin = “L”.
MS0596-E-00
-5-
2007/04
5 Page 
[AK4371]
FILTER CHARACTERISTICS
(Ta=25°C; AVDD, DVDD, PVDD, HVDD=1.6 ∼ 3.6V; fs=44.1kHz; De-emphasis = “OFF”)
Parameter
Symbol
min
typ
DAC Digital Filter: (Note 17)
Passband (Note 18)
−0.05dB
PB
0
-
−6.0dB
- 22.05
Stopband (Note 18)
SB 24.1
-
Passband Ripple
PR -
-
Stopband Attenuation
SA 54
-
Group Delay (Note 19)
GD -
22
Group Delay Distortion
ΔGD
-
0
DAC Digital Filter + Analog Filter: (Note 17, Note 20)
Frequency Response 0 ∼ 20.0kHz FR - ±0.5
Analog Filter: (Note 21)
Frequency Response 0 ∼ 20.0kHz FR - ±1.0
BOOST Filter: (Note 20, Note 22)
Frequency Response 20Hz FR - 5.76
MIN 100Hz
- 2.92
1kHz
- 0.02
20Hz FR - 10.80
MID 100Hz
- 6.84
1kHz
- 0.13
20Hz FR - 16.06
MAX 100Hz
- 10.54
1kHz
- 0.37
max
20.0
-
-
±0.02
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Units
kHz
kHz
kHz
dB
dB
1/fs
µs
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Note 17. BOOST OFF (BST1-0 bit = “00”)
Note 18. The passband and stopband frequencies scale with fs (system sampling rate).
For example, PB=0.4535fs(@−0.05dB). SB=0.546fs(@−54dB).
Note 19. This time is from setting the 24-bit data of both channels from the input register to the output of analog signal.
Note 20. DAC Æ HPL, HPR, LOUT, ROUT, MOUT
Note 21. LIN1/LIN2/LIN3/RIN1/RIN2/RIN3 Æ HPL/HPR/LOUT/ROUT/MOUT
Note 22. These frequency responses scale with fs. If high-level signal is input, the output clips at low frequency.
20
MAX
15
MID
10
MIN
5
0
-5
10
Boost Filter (fs=44.1kHz)
100 1000
Frequency [Hz]
Figure 2. Boost Frequency (fs=44.1kHz)
10000
MS0596-E-00
- 11 -
2007/04
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK4371.PDF ] | |
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