Datasheet.kr   

24FC1026 데이터시트 PDF




Microchip에서 제조한 전자 부품 24FC1026은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 24FC1026 자료 제공

부품번호 24FC1026 기능
기능 EEPROM
제조업체 Microchip
로고 Microchip 로고


24FC1026 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 30 페이지수

미리보기를 사용할 수 없습니다

24FC1026 데이터시트, 핀배열, 회로
24AA1026/24LC1026/24FC1026
1024K I2C Serial EEPROM
Device Selection Table
Part
Number
VCC
Range
Max. Clock Temp.
Frequency Ranges
24AA1026
24LC1026
24FC1026
1.7V-5.5V
2.5V-5.5V
1.8V-5.5V
400 kHz(1)
400 kHz(2)
1 MHz(3)
I
I, E
I
Note 1: 100 kHz for VCC < 2.5V
2: 100 kHz for VCC < 4.5V (E-temp)
3: 400 kHz for VCC < 2.5V
Features
• Low-Power CMOS Technology:
- Read current 450 µA, maximum
- Standby current 5 µA, maximum
• 2-Wire Serial Interface, I2C Compatible
• Cascadable up to Four Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• 1 MHz Clock for FC Versions
• Page Write Time 3 ms, typical
• Self-Timed Erase/Write Cycle
• 128-Byte Page Write Buffer
• Hardware Write-Protect
• Electrostatic Discharge (ESD) Protection >4000V
• More than One Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programming Available
• Packages Include 8-lead PDIP, SOIC and SOIJ
• RoHS Compliant
• Temperature Ranges:
- Industrial (I): -40C to +85C
- Automotive (E): -40C to +125C
Description
The Microchip Technology Incorporated
24AA1026/24LC1026/24FC1026 (24XX1026*) is a
128K x 8 (1024 Kbit) Serial Electrically Erasable
PROM, capable of operation across a broad voltage
range (1.7V to 5.5V).
It has been developed for advanced, low-power
applications such as personal communications or data
acquisition. This device has both byte write and page
write capability of up to 128 bytes of data.
This device is capable of both random and sequential
reads. Reads may be sequential within address
boundaries 0000h to FFFFh and 10000h to 1FFFFh.
Functional address lines allow up to four devices on the
same data bus. This allows for up to 4 Mbits total
system EEPROM memory. This device is available in
the standard 8-pin PDIP, SOIC and SOIJ packages.
Package Type
8-Lead PDIP
8-Lead SOIC/SOIJ
NC 1
A1 2
A2 3
VSS 4
8 VCC NC
7 WP A1
6 SCL A2
5 SDA VSS
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
Block Diagram
A1A2 WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
I/O SCL
SDA
VCC
VSS
XDEC
EEPROM
Array
Page Latches
YDEC
Sense AMP
R/W Control
*24XX1026 is used in this document as a generic part
number for the 24AA1026/24LC1026/24FC1026
devices.
2011-2015 Microchip Technology Inc.
DS20002270E-page 1




24FC1026 pdf, 반도체, 판매, 대치품
24AA1026/24LC1026/24FC1026
AC CHARACTERISTICS (Continued)
Electrical Characteristics:
Industrial (I): VCC = +1.7V to 5.5V TA = -40°C to +85°C
Automotive (E): Vcc = +2.5V to 5.5V TA = -40°C to +125°C
Param.
No.
Sym.
Characteristic
Min.
Max. Units
Conditions
9 TSU:DAT Data Input Setup Time 250 — ns 1.7V VCC 2.5V
250 — ns 2.5V VCC 4.5V, E-temp
100 — ns 2.5V VCC 5.5V
100 — ns 1.8V VCC 2.5V (24FC1026)
100 — ns 2.5V VCC 5.5V (24FC1026)
10 TSU:STO Stop Condition Setup
Time
4000
4000
— ns 1.7V VCC 2.5V
— ns 2.5V VCC 4.5V, E-temp
600 — ns 2.5V VCC 5.5V
600 — ns 1.8V VCC 2.5V (24FC1026)
250 — ns 2.5V VCC 5.5V (24FC1026)
11 TSU:WP WP Setup Time
4000
— ns 1.7V VCC 2.5V
4000
— ns 2.5V VCC 4.5V, E-temp
600 — ns 2.5V VCC 5.5V
600 — ns 1.8V VCC 2.5V (24FC1026)
600 — ns 2.5V VCC 5.5V (24FC1026)
12 THD:WP WP Hold Time
4700
— ns 1.7V VCC 2.5V
4700
— ns 2.5V VCC 4.5V, E-temp
1300
— ns 2.5V VCC 5.5V
1300
— ns 1.8V VCC 2.5V (24FC1026)
1300
— ns 2.5V VCC 5.5V (24FC1026)
13 TAA Output Valid from Clock — 3500 ns 1.7V VCC 2.5V
(Note 2)
— 3500 ns 2.5V VCC 4.5V, E-temp
— 900 ns 2.5V VCC 5.5V
— 900 ns 1.8V VCC 2.5V (24FC1026)
— 400 ns 2.5V VCC 5.5V (24FC1026)
14 TBUF Bus Free Time: bus time
4700
— ns 1.7V VCC 2.5V
must be free before a new
transmission can start
4700
1300
— ns 2.5V VCC 4.5V, E-temp
— ns 2.5V VCC 5.5V
1300
— ns 1.8V VCC 2.5V (24FC1026)
500 — ns 2.5V VCC 5.5V (24FC1026)
15 TSP Input Filter Spike
Suppression
(SDA and SCL pins)
— 50 ns All except 24FC1026 (Notes 1 and 3)
16
TWC Write Cycle Time (byte or
page)
5 ms
17 Endurance
1,000,000
— cycles Page mode, 25°C, VCC = 5.5V (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but established by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s website
at www.microchip.com.
DS20002270E-page 4
2011-2015 Microchip Technology Inc.

4페이지










24FC1026 전자부품, 판매, 대치품
24AA1026/24LC1026/24FC1026
4.0 BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Accordingly, the following bus conditions have been
defined (Figure 4-1).
4.1 Bus Not Busy (A)
Both data and clock lines remain high.
4.2 Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
4.3 Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must end with a Stop condition.
4.4 Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one bit of data per
clock pulse.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device.
4.5 Acknowledge
Each receiving device, when addressed, is obliged to
generate an Acknowledge signal after the reception of
each byte. The master device must generate an extra
clock pulse which is associated with this Acknowledge
bit.
Note:
The 24XX1026 does not generate any
Acknowledge bits if an internal
programming cycle is in progress,
however, the control byte that is being
polled must match the control byte used to
initiate the write cycle.
A device that acknowledges must pull-down the SDA
line during the Acknowledge clock pulse in such a way
that the SDA line is stable low during the high period of
the acknowledge related clock pulse. Of course, setup
and hold times must be taken into account. During
reads, a master must signal an end of data to the slave
by NOT generating an Acknowledge bit on the last byte
that has been clocked out of the slave. In this case, the
slave (24XX1026) will leave the data line high to enable
the master to generate the Stop condition.
FIGURE 4-1:
(A) (B)
SCL
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(D) (D)
(C) (A)
SDA
Start
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
FIGURE 4-2:
ACKNOWLEDGE TIMING
Acknowledge
Bit
SCL 1 2 3 4 5 6 7 8 9 1 2 3
Stop
Condition
SDA
Data from transmitter
The transmitter must release the SDA line at this
point allowing the receiver to pull the SDA line low
to acknowledge the previous eight bits of data.
Data from transmitter
The receiver must release the SDA line at
this point so the transmitter can continue
sending data.
2011-2015 Microchip Technology Inc.
DS20002270E-page 7

7페이지


구       성 총 30 페이지수
다운로드[ 24FC1026.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
24FC1025

1024K I2C CMOS Serial EEPROM

Microchip Technology
Microchip Technology
24FC1026

EEPROM

Microchip
Microchip

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵