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부품번호 UJA1078ATW 기능
기능 High-speed CAN/dual LIN core system basis chip
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UJA1078ATW 데이터시트, 핀배열, 회로
UJA1078A
High-speed CAN/dual LIN core system basis chip
Rev. 2 — 28 January 2011
Product data sheet
1. General description
The UJA1078A core System Basis Chip (SBC) replaces the basic discrete components
commonly found in Electronic Control Units (ECU) with a high-speed Controller Area
Network (CAN) and two Local Interconnect Network (LIN) interfaces.
The UJA1078A supports the networking applications used to control power and sensor
peripherals by using a high-speed CAN as the main network interface and the LIN
interfaces as local sub-busses.
The core SBC contains the following integrated devices:
High-speed CAN transceiver, inter-operable and downward compatible with CAN
transceiver TJA1042, and compatible with the ISO 11898-2 and ISO 11898-5
standards
LIN transceivers compliant with LIN 2.1, LIN 2.0 and SAE J2602, and compatible with
LIN 1.3
Advanced independent watchdog (UJA1078A/xx/WD versions)
250 mA voltage regulator for supplying a microcontroller; extendable with external
PNP transistor for increased current capability and dissipation distribution
Separate voltage regulator for supplying the on-board CAN transceiver
Serial Peripheral Interface (SPI) (full duplex)
2 local wake-up input ports
Limp home output port
In addition to the advantages gained from integrating these common ECU functions in a
single package, the core SBC offers an intelligent combination of system-specific
functions such as:
Advanced low-power concept
Safe and controlled system start-up behavior
Detailed status reporting on system and sub-system levels
The UJA1078A is designed to be used in combination with a microcontroller that
incorporates a CAN controller. The SBC ensures that the microcontroller always starts up
in a controlled manner.




UJA1078ATW pdf, 반도체, 판매, 대치품
NXP Semiconductors
UJA1078A
High-speed CAN/dual LIN core system basis chip
3. Ordering information
Table 1. Ordering information
Type number[1]
Package
Name
UJA1078ATW/5V0/WD HTSSOP32
UJA1078ATW/3V3/WD
UJA1078ATW/5V0
UJA1078ATW/3V3
Description
plastic thermal enhanced thin shrink small outline package;
32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die
pad
Version
SOT549-1
[1] UJA1078ATW/5V0xx versions contain a 5 V regulator (V1); UJA1078ATW/3V3xx versions contain a 3.3 V regulator (V1); WD versions
contain a watchdog.
4. Block diagram
BAT
GND
SCK
SDI
SDO
SCSN
WAKE1
WAKE2
WDOFF
EN
DLIN
LIN1
TXDL1
RXDL1
LIN2
TXDL2
RXDL2
WAKE
BAT
Fig 1. Block diagram
V1
V2
UJA1078A
V1
V2
V1 V2
UV UV
EXT. PNP
CTRL
VEXCTRL
VEXCC
WBIAS
SYSTEM
CONTROLLER
OSC
TEMP
INTN
RSTN
LIMP
LIN1
LIN2
BAT
HS-CAN
V2
CANH
CANL
TXDC
RXDC
SPLIT
015aaa184
UJA1078A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 28 January 2011
© NXP B.V. 2011. All rights reserved.
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UJA1078ATW 전자부품, 판매, 대치품
NXP Semiconductors
UJA1078A
High-speed CAN/dual LIN core system basis chip
6.1 System Controller
6.1.1 Introduction
The system controller manages register configuration and controls the internal functions
of the SBC. Detailed device status information is collected and presented to the
microcontroller. The system controller also provides the reset and interrupt signals.
The system controller is a state machine. The SBC operating modes, and how transitions
between modes are triggered, are illustrated in Figure 3. These modes are discussed in
more detail in the following sections.
UJA1078A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 28 January 2011
© NXP B.V. 2011. All rights reserved.
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UJA1078ATW

High-speed CAN/dual LIN core system basis chip

NXP Semiconductors
NXP Semiconductors

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