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KAI-2020CM 데이터시트 PDF




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부품번호 KAI-2020CM 기능
기능 CCD IMAGE SENSOR
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KAI-2020CM 데이터시트, 핀배열, 회로
KAI-2020
1600 (H) x 1200 (V) Interline
CCD Image Sensor
Description
The KAI2020 Image Sensor is a high-performance 2-million pixel
sensor designed for a wide range of medical, scientific and machine
vision applications. The 7.4 mm square pixels with microlenses
provide high sensitivity and the large full well capacity results in high
dynamic range. The split horizontal register offers a choice of single or
dual output allowing either 18 or 35 frame per second (fps) video rate
for the progressively scanned images. Also included is a fast line
dump for subsampling at higher frame rates. The vertical overflow
drain structure provides antiblooming protection and enables
electronic shuttering for precise exposure control. Other features
include low dark current, negligible lag and low smear.
Table 1. GENERAL SPECIFICATIONS
Parameter
Architecture
Total Number of Pixels
Number of Effective Pixels
Number of Active Pixels
Pixel Size
Active Image Size
Typical Value
Interline CCD, Progressive Scan
1640 (H) × 1214 (V)
1608 (H) × 1208 (V)
1600 (H) × 1200 (V)
7.4 mm (H) × 7.4 mm (V)
11.84 mm (H) × 8.88 mm (V),
14.80 mm (Diagonal)
Aspect Ratio
Number of Outputs
Saturation Signal
40 MHz
20 MHz
Output Sensitivity
Quantum Efficiency
ABA (460 nm)
FBA (455 nm, 530 nm, 600 nm)
CBA (460 nm, 540 nm, 620 nm)
Readout Noise
40 MHz
20 MHz
4:3
1 or 2
20,000 e
40,000 e
30 mV/e
55%
47%, 39%, 35%
46%, 41%, 33%
20 electrons
16 electrons
Dynamic Range
40 MHz
20 MHz
Dark Current
Maximum Pixel Clock Speed
Maximum Frame Rate
Dual Output
Single Output
Package Type
Package Size
60 dB
68 dB
< 0.5 nA/cm2
40 MHz
35 fps
18 fps
32 pin CerDIP
0.790” [20.07 mm] width
1.300” [33.02 mm] length
Package Pin Spacing
0.070”
Cover Glass
AR coated, 2 sides
NOTE: Parameters above are specified at T = 40°C unless otherwise noted.
© Semiconductor Components Industries, LLC, 2015
October, 2015 Rev. 3
1
www.onsemi.com
Figure 1. KAI2020 Interline CCD
Image Sensor
Features
High Resolution
High Sensitivity
High Dynamic Range
Low Noise Architecture
High Frame Rate
Binning Capability for Higher Frame Rate
Electronic Shutter
Applications
Intelligent Transportation Systems
Machine Vision
Scientific
Surveillance
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Publication Order Number:
KAI2020/D




KAI-2020CM pdf, 반도체, 판매, 대치품
KAI2020
Pixel
DTCirrhaeoancfrstgifoeeÉÉÉÉÉÉÉÉÉnr ÉÉÉÉÉÉÉÉÉPhTGÉÉÉÉÉÉÉÉÉoraatotnedsÉÉÉÉÉÉÉÉÉifoeTrdoÉÉÉÉÉÉÉÉÉËËËËepViÉÉÉÉÉÉÉÉÉËËËËew ÉÉÉÉÉÉÉÉÉËËËËVV21ÉÉÉÉÉÉÉÉÉËËËËÉÉÉÉÉÉÉÉÉËËËË
7.4 mm
True Two Phase Burried Channel VCCD
Lightshield over VCCD not shown
Cross Section Down Through VCCD
V1 V2
V1
ÉÉnÉÉ
ÉÉnÉÉn ÉÉnÉÉ
p Well (GND)
Direction of
Charge
Transfer
n Substrate
Cross Section Through
Photodiode and VCCD Phase 1
Light Shield
Photodiode
ÉÉp
p+
n
ÉÉÉÉÏÏp ÏÏÏÏÏÏVnp1 ÏÏÏÏÏÏÉÉp
p
Cross Section Through Photodiode
and VCCD Phase 2 at Transfer Gate
Transfer
Gate
ÉÉp p+
ÉÉ n
Light Shield
ÏÏÏÏVÏÏ2pnÏÏÏÏÏÏÉÉpÉÉ
p
n Substrate
n Substrate
NOTE: Drawings not scale.
Cross Section Showing Lenslet
Lenslet
Light Shield
VCCD
Photodiode
Light Shield
VCCD
Figure 3. Pixel Architecture
An electronic representation of an image is formed when
incident photons falling on the sensor plane create
electronhole pairs within the individual silicon
photodiodes. These photoelectrons are collected locally by
the formation of potential wells at each photosite. Below
photodiode saturation, the number of photoelectrons
collected at each pixel is linearly dependent upon light level
and exposure time and nonlinearly dependent on
wavelength. When the photodiodes charge capacity is
reached, excess electrons are discharged into the substrate to
prevent blooming.
www.onsemi.com
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KAI-2020CM 전자부품, 판매, 대치품
KAI2020
Horizontal Register Split
H1 H2 H2 H1
H1 H2
H2 H1 H1 H2
H1BL
H2SL
H2BL
H1SL
H1BL
H2SL
H1BR
H1SR
H2BR
H2SR
Pixel
824
Single Output
H1 H2 H2 H1 H1 H2
Pixel
825
H1 H1 H2 H2
H1BL
H2SL
H2BL
H1SL
H1BL
H2SL
H1BR H1SR
H2BR
H2SR
Pixel
824
Pixel
825
Dual Output
Figure 6. Horizontal Register
Single Output Operation
When operating the sensor in single output mode all pixels
of the image sensor will be shifted out the Video L output
(pin 31). To conserve power and lower heat generation the
output amplifier for Video R may be turned off by
connecting VDDR (pin 24) and VOUTR (pin 24) to GND
(zero volts).
The H1 timing from the timing diagrams should be
applied to H1SL, H1BL, H1SR, H2BR, and the H2 timing
should be applied to H2SL, H2BL, H2SR, and H1BR. In
other words, the clock driver generating the H1 timing
should be connected to pins 4, 3, 13, and 15. The clock driver
generating the H2 timing should be connected to pins 5, 2,
12, and 14. The horizontal CCD should be clocked for 4
empty pixels plus 16 light shielded pixels plus 1608
photoactive pixels plus 16 light shielded pixels for a total of
1644 pixels.
Dual Output Operation
In dual output mode the connections to the H1BR and
H2BR pins are swapped from the single output mode to
change the direction of charge transfer of the right side
horizontal shift register. In dual output mode both VDDL
and VDDR (pins 25, 24) should be connected to 15 V. The
H1 timing from the timing diagrams should be applied to
H1SL, H1BL, H1SR, H1BR, and the H2 timing should be
applied to H2SL, H2BL, H2SR, and H2BR. The clock driver
generating the H1 timing should be connected to pins 4, 3,
13, and 14. The clock driver generating the H2 timing should
be connected to pins 5, 2, 12, and 15. The horizontal CCD
should be clocked for 4 empty pixels plus 16 light shielded
pixels plus 804 photoactive pixels for a total of 824 pixels.
If the camera is to have the option of dual or single output
mode, the clock driver signals sent to H1BR and H2BR may
be swapped by using a relay. Another alternative is to have
two extra clock drivers for H1BR and H2BR and invert the
signals in the timing logic generator. If two extra clock
drivers are used, care must be taken to ensure the rising and
falling edges of the H1BR and H2BR clocks occur at the
same time (within 3 ns) as the other HCCD clocks.
www.onsemi.com
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CCD IMAGE SENSOR

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