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부품번호 | MMFT3055ET1 기능 |
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기능 | Power MOSFET ( Transistor ) | ||
제조업체 | ON Semiconductor | ||
로고 | |||
전체 7 페이지수
MMFT3055E
Power MOSFET
1.7 Amp, 60 Volts
N−Channel TMOS E−FETt SOT−223
This advanced E−FET is a TMOS Medium Power MOSFET
designed to withstand high energy in the avalanche and commutation
modes. This new energy efficient device also offers a drain−to−source
diode with a fast recovery time. Designed for low voltage, high speed
switching applications in power supplies, dc−dc converters and PWM
motor controls, these devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected voltage
transients. The device is housed in the SOT−223 package which is
designed for medium power surface mount applications.
Features
• Silicon Gate for Fast Switching Speeds
• Low RDS(on) — 0.15 Ω max
• The SOT−223 Package can be Soldered Using Wave or Reflow. The
Formed Leads Absorb Thermal Stress During Soldering, Eliminating
the Possibility of Damage to the Die
• Available in 12 mm Tape and Reel
Use MMFT3055ET1 to order the 7 inch/1000 unit reel.
Use MMFT3055ET3 to order the 13 inch/4000 unit reel.
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage− Continuous
Drain Current − Continuous
Drain Current − Single Pulse (tp ≤ 10 ms)
Total Power Dissipation @ TA = 25°C
Derate above 25°C (Note 1)
VDSS
VGS
ID
IDM
PD
60
± 20
1.7
6.8
0.8
6.3
Vdc
Vdc
Adc
Apk
Watts
mW/°C
Operating and Storage Temperature
Range
TJ, Tstg
−65 to
150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 60 Vdc, VGS = 10 Vdc, Peak
IL = 1.7 Apk, L = 0.2 mH, RG = 25 Ω )
Thermal Resistance
− Junction to Ambient (surface mounted)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10
seconds
EAS
RθJA
TL
mJ
168
°C/W
156
260 °C
1. Power rating when mounted on FR−4 glass epoxy printed circuit board
using recommended footprint.
http://onsemi.com
VDSS
60 V
RDS(ON) TYP
150 mΩ
N−Channel
2,4
D
ID MAX
1.7 A
1
G
4
12
3
SOT−223
CASE 318E
STYLE 3
S
3
MARKING
DIAGRAM
3055
LWW
L = Location Code
WW = Work Week
PIN ASSIGNMENT
4 Drain
123
Gate Drain Source
ORDERING INFORMATION
Device
Package
Shipping†
MMFT3055ET1 SOT−223 1000 Tape & Reel
MMFT3055ET3 SOT−223 4000 Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 5
1
Publication Order Number:
MMFT3055E/D
MMFT3055E
FORWARD BIASED SAFE OPERATING AREA
The FBSOA curves define the maximum drain−to−source
voltage and drain current that a device can safely handle
when it is forward biased, or when it is on, or being turned
on. Because these curves include the limitations of
simultaneous high voltage and high current, up to the rating
of the device, they are especially useful to designers of linear
systems. The curves are based on an ambient temperature of
25°C and a maximum junction temperature of 150°C.
Limitations for repetitive pulses at various ambient
temperatures can be determined by using the thermal
response curves. Application Note, AN569, “Transient
Thermal Resistance−General Data and Its Use” provides
detailed instructions.
SWITCHING SAFE OPERATING AREA
The switching safe operating area (SOA) is the boundary
that the load line may traverse without incurring damage to
the MOSFET. The fundamental limits are the peak current,
IDM and the breakdown voltage, BVDSS. The switching
SOA is applicable for both turn−on and turn−off of the
devices for switching times less than one microsecond.
10
VGS = 20 V
SINGLE PULSE
TA = 25°C
1
20 ms
100 ms
0.1
0.01
0.1
DC
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
1s
500 ms
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Maximum Rated Forward Biased
Safe Operating Area
1.0
0.1
0.01
0.001
1.0E−05
D = 0.5
0.2
0.1
0.05
0.02
0.01
1.0E−04
SINGLE PULSE
P(pk)
t1
t2
RθJA(t) = r(t) RθJA
RθJA = 156°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) RθJA(t)
DUTY CYCLE, D = t1/t2
1.0E−03
1.0E−02
t, TIME (s)
1.0E−01
Figure 8. Thermal Response
1.0E+00
1.0E+01
COMMUTATING SAFE OPERATING AREA (CSOA)
The Commutating Safe Operating Area (CSOA) of Figure
10 defines the limits of safe operation for commutated
source−drain current versus re−applied drain voltage when
the source−drain diode has undergone forward bias. The
curve shows the limitations of IFM and peak VDS for a given
rate of change of source current. It is applicable when
waveforms similar to those of Figure 9 are present. Full or
half−bridge PWM DC motor controllers are common
applications requiring CSOA data.
Device stresses increase with increasing rate of change of
source current so dIS/dt is specified with a maximum value.
Higher values of dIS/dt require an appropriate derating of
IFM, peak VDS or both. Ultimately dIS/dt is limited primarily
by device, package, and circuit impedances. Maximum
device stress occurs during trr as the diode goes from
conduction to reverse blocking.
VDS(pk) is the peak drain−to−source voltage that the
device must sustain during commutation; IFM is the
maximum forward source−drain diode current just prior to
the onset of commutation.
VR is specified at 80% rated BVDSS to ensure that the
CSOA stress is maximized as IS decays from IRM to zero.
RGS should be minimized during commutation. TJ has
only a second order effect on CSOA.
Stray inductances in ON Semiconductor’s test circuit are
assumed to be practical minimums. dVDS/dt in excess of
10 V/ns was attained with dIS/dt of 400 A/ms.
http://onsemi.com
4
4페이지 MMFT3055E
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE K
A
F
4
S
1 23
B
LG
0.08 (0003)
H
D
J
C
M
K
SOLDERING FOOTPRINT*
3.8
0.15
2.0
0.079
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
A 0.249 0.263
B 0.130 0.145
C 0.060 0.068
D 0.024 0.035
F 0.115 0.126
G 0.087 0.094
H 0.0008 0.0040
J 0.009 0.014
K 0.060 0.078
L 0.033 0.041
M 0_ 10 _
S 0.264 0.287
MILLIMETERS
MIN MAX
6.30 6.70
3.30 3.70
1.50 1.75
0.60 0.89
2.90 3.20
2.20 2.40
0.020 0.100
0.24 0.35
1.50 2.00
0.85 1.05
0 _ 10 _
6.70 7.30
STYLE 3:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
2.3
0.091
2.3
0.091
6.3
0.248
2.0
0.079
1.5
0.059
ǒ ǓSCALE 6:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
E−FET is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
7
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
MMFT3055E/D
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부품번호 | 상세설명 및 기능 | 제조사 |
MMFT3055ET1 | Power MOSFET ( Transistor ) | ON Semiconductor |
MMFT3055ET3 | Power MOSFET ( Transistor ) | ON Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |