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PDF DAC1201D125 Data sheet ( Hoja de datos )
| Número de pieza | DAC1201D125 | |
| Descripción | Dual 12-bit DAC | |
| Fabricantes | NXP Semiconductors | |
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DAC1201D125
Dual 12-bit DAC, up to 125 Msps
Rev. 2 — 27 January 2012
Product data sheet
1. General description
The DAC1201D125 is a dual-port, high-speed, 2-channel CMOS Digital-to-Analog
Converter (DAC), optimized for high dynamic performance with low power dissipation.
Supporting an update rate of up to 125 Msps, the DAC1201D125 is suitable for Direct IF
applications.
Separate write inputs allow data to be written to the two DAC ports independently of one
another. Two separate clocks control the update rate of each DAC port.
The DAC1201D125 can interface two separate data ports or one single interleaved
high-speed data port. In Interleaved mode, the input data stream is demultiplexed into its
original I and Q data and latched. The I and Q data is then converted by the two DACs
and updated at half the input data rate.
Each DAC port has a high-impedance differential current output, suitable for both
single-ended and differential analog output configurations.
The DAC1201D125 is pin compatible with the AD9765, DAC2902 and DAC5662.
2. Features and benefits
Dual 12-bit resolution
125 Msps update rate
Single 3.3 V supply
Dual-port or Interleaved data modes
1.8 V, 3.3 V and 5 V compatible digital
inputs
Internal and external reference
2 mA to 20 mA full-scale output current
Typical 185 mW power dissipation
16 mW power-down
SFDR: 81 dBc; fo = 1 MHz; fs = 52 Msps
SFDR: 78 dBc; fo = 10.4 MHz; fs = 78
Msps
SFDR: 74 dBc; fo = 1 MHz;
fs = 52 Msps; 12 dBFS
LQFP48 package
Industrial temperature range of
40 C to +85 C
3. Applications
Quadrature modulation
Medical/test instrumentation
Direct IF applications
Direct digital frequency synthesis
Arbitrary waveform generator
1 page  
NXP Semiconductors
DAC1201D125
Dual 12-bit DAC, up to 125 Msps
7. Limiting values
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
VDDD
VDDA
VDD
VI
VO
Tstg
Tamb
Tj
digital supply voltage
analog supply
voltage
supply voltage
difference
input voltage
output voltage
storage temperature
ambient temperature
junction temperature
between analog and digital supply
voltage
digital inputs referenced to DGND
pins REFIO, AVIRES, BVIRES
referenced to AGND
pins IOUTAP, IOUTAN, IOUTBP and
IOUTBN referenced to AGND
[1] 0.3
[1] 0.3
150
0.3
0.3
0.3
55
40
-
Max
+5.0
+5.0
+150
+5.5
+5.5
VDDA +
0.3
+150
+85
125
Un
it
V
V
mV
V
V
V
C
C
C
[1] All supplies are connected together.
8. Thermal characteristics
Table 4.
Symbol
Rth(j-a)
Rth(c-a)
Thermal characteristics
Parameter
thermal resistance from junction to ambient
thermal resistance from case to ambient
Conditions
in free air
in free air
Typ Unit
89.3 K/W
60.6 K/W
9. Characteristics
Table 5. Characteristics
VDDD = VDDA = 3.3 V; AGND and DGND connected together; IO(fs) = 20 mA and Tamb = 40 C to +85 C; typical values
measured at Tamb = 25 C.
Symbol Parameter
Conditions
Min Typ Max
Unit
Supplies
VDDD
VDDA
IDDD
IDDA
Ptot
Ppd
digital supply voltage
analog supply voltage
digital supply current
analog supply current
total power dissipation
power dissipation in
power-down mode
fs = 65 Msps, fo = 1 MHz,
VDD = 3.0 V to 3.6 V
fs = 65 Msps, fo = 1 MHz,
VDD = 3.0 V to 3.6 V
fs = 65 Msps, fo = 1 MHz,
VDD = 3.0 V to 3.6 V
3.0 3.3 3.65
3.0 3.3 3.65
- 67
- 50 65
- 185 260
- 16.5 -
V
V
mA
mA
mW
mW
DAC1201D125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 January 2012
© NXP B.V. 2012. All rights reserved.
5 of 28
5 Page 
NXP Semiconductors
DAC1201D125
Dual 12-bit DAC, up to 125 Msps
0
α
(dBm)
−20
001aai990
−40
−60
−80
−100
0
10 20 30
fs = 78 Msps; from fc = 9.5 MHz, 110 kHz spacing; = 0 dBFS
Fig 7. 8-tone SFDR
f (MHz)
40
0.8
INL
(dB)
0.4
001aaj002
0
−0.4
−0.8
0
744
1488
2232
Fig 8. INL as a function of the input code
2976
3720
4464
input code
DAC1201D125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 January 2012
© NXP B.V. 2012. All rights reserved.
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