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AD9944 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 AD9944은 전자 산업 및 응용 분야에서
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부품번호 AD9944 기능
기능 CCD Signal Processors
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AD9944 데이터시트, 핀배열, 회로
Data Sheet
Complete 10-Bit and 12-Bit, 25 MHz
CCD Signal Processors
AD9943/AD9944
FEATURES
25 MSPS correlated double sampler (CDS)
6 dB to 40 dB 10-bit variable gain amplifier (VGA)
Low noise optical black clamp circuit
Preblanking function
10-bit (AD9943), 12-bit (AD9944) 25 MSPS A/D converter
No missing codes guaranteed
3-wire serial digital interface
3 V single-supply operation
Space-saving 32-lead 5 mm × 5 mm LFCSP package
APPLICATIONS
Digital still cameras
Digital video camcorders
PC cameras
Portable CCD imaging devices
CCTV cameras
GENERAL DESCRIPTION
The AD9943/AD9944 are complete analog signal processors
for CCD applications. They feature a 25 MHz single-channel
architecture designed to sample and condition the outputs of
interlaced and progressive scan area CCD arrays. The signal
chain for the AD9943/AD9944 consists of a correlated double
sampler (CDS), a digitally controlled variable gain amplifier
(VGA), and a black level clamp. The AD9943 offers 10-bit
ADC resolution, while the AD9944 contains a true 12-bit ADC.
The internal registers are programmed through a 3-wire
serial digital interface. Programmable features include gain
adjustment, black level adjustment, input clock polarity, and
power-down modes. The AD9943/AD9944 operate from a
single 3 V power supply, typically dissipate 79 mW, and are
packaged in space-saving 32-lead LFCSP packages.
FUNCTIONAL BLOCK DIAGRAM
REFT REFB
PBLK
AD9943/AD9944
CCDIN
CDS
6dB–40dB
VGA
BAND GAP
REFERENCE
10-/12-BIT
ADC
10/12
DRVDD
DRVSS
DOUT
AVDD
AVSS
10
CONTROL
REGISTERS
DIGITAL
INTERFACE
CLP
CLPOB
INTERNAL
TIMING
DVDD
DVSS
SL SCK SDATA
SHP SHD DATACLK
Figure 1. Functional Block Diagram
Rev. C
Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2004–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com




AD9944 pdf, 반도체, 판매, 대치품
AD9943/AD9944
Data Sheet
Parameter
A/D CONVERTER
Resolution
Differential Nonlinearity (DNL)
No Missing Codes
Data Output Coding
Full-Scale Input Voltage
VOLTAGE REFERENCE
Reference Top Voltage (REFT)
Reference Bottom Voltage (REFB)
SYSTEM PERFORMANCE
Gain Range
Low Gain (VGA Code = 0)
Maximum Gain (VGA Code = 1023)
Gain Accuracy
Peak Nonlinearity 500 mV Input Signal
Total Output Noise
Power Supply Rejection (PSR)
1 Input signal characteristics defined as follows:
Min Typ
Max Unit
Conditions
10
±0.3
Guaranteed
Straight binary
2.0
Bits
LSB
V
2.0 V
1.0 V
Specifications include entire signal chain.
5.3
40 41.5
±1
0.1
0.3
50
dB
dB
dB
%
LSB rms
dB
12 dB gain applied.
AC grounded input, 6 dB gain applied.
Measured with step change on supply.
500mV TYP
RESET TRANSIENT
100mV TYP
OPTICAL BLACK PIXEL
1V TYP
INPUT SIGNAL RANGE
AD9944 SYSTEM SPECIFICATIONS
TMIN to TMAX, AVDD = DVDD = DRVDD = 3 V, fSAMP = 25 MHz, unless otherwise noted.
Table 3.
Parameter
CDS
Maximum Input Range before Saturation1
Allowable CCD Reset Transient1
Maximum CCD Black Pixel Amplitude1
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
Gain Monotonicity
Gain Range
Minimum Gain
Maximum Gain
Min Typ
1.0
500
100
1024
Guaranteed
5.3
40 41.5
Max Unit
V p-p
mV
mV
Steps
dB
dB
BLACK LEVEL CLAMP
Clamp Level Resolution
Clamp Level
Minimum Clamp Level
Maximum Clamp Level
A/D CONVERTER
Resolution
Differential Nonlinearity (DNL)
No Missing Codes
Data Output Coding
Full-Scale Input Voltage
256
0
255
12
±0.4
Guaranteed
Straight binary
2.0
Steps
LSB
LSB
Bits
LSB
V
Conditions
See input waveform in footnote.
See Figure 13 for VGA gain curve.
See Variable Gain Amplifier section for VGA
gain equation.
Measured at ADC output.
Rev. C | Page 4 of 20

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AD9944 전자부품, 판매, 대치품
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
D0 1
D1 2
D2 3
D3 4
D4 5
D5 6
D6 7
D7 8
AD9943
TOP VIEW
(Not to Scale)
24 REFB
23 REFT
22 CCDIN
21 AVSS
20 AVDD
19 SHD
18 SHP
17 CLPOB
AD9943/AD9944
1NC = NO CONNECT. INTERNALLY PULLED DOWN. FLOAT OR CONNECT TO GND.
2NC = NO CONNECT. INTERNALLY NOT CONNECTED.
NOTES
1. SOLDER THE EXPOSED PAD TO THE GROUND PLANE OF THE PCB.
Figure 2. AD9943 Pin Configuration
Table 6. AD9943 Pin Function Descriptions
Pin No.
Mnemonic
Type1
1 to 10
D0 to D9
DO
11 DRVDD
P
12 DRVSS
P
13 DVDD
P
14
DATACLK
DI
15 DVSS
P
16 PBLK
DI
17 CLPOB
DI
18 SHP
DI
19 SHD
DI
20 AVDD
P
21 AVSS
P
22 CCDIN
AI
23 REFT
AO
24 REFB
AO
25 SL
DI
26 SDATA
DI
27 SCK
DI
28 to 30
NC
NC
31 to 32
NC
NC
EPAD
Description
Digital Data Outputs.
Digital Output Driver Supply.
Digital Output Driver Ground.
Digital Supply.
Digital Data Output Latch Clock.
Digital Supply Ground.
Preblanking Clock Input.
Black Level Clamp Clock Input.
CDS Sampling Clock for CCD Reference Level.
CDS Sampling Clock for CCD Data Level.
Analog Supply.
Analog Ground.
Analog Input for CCD Signal.
A/D Converter Top Reference Voltage Decoupling.
A/D Converter Bottom Reference Voltage Decoupling.
Serial Digital Interface Load Pulse.
Serial Digital Interface Data Input.
Serial Digital Interface Clock Input.
Internally pulled down. Float or connect to GND.
Internally not connected.
Exposed Pad. Solder the exposed pad to the ground plane of the PCB.
1 Type: AI = analog input, AO = analog output, DI = digital input, DO = digital output, P = power, and NC = no connect.
Rev. C | Page 7 of 20

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