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PDF SC73C1402D Data sheet ( Hoja de datos )
| Número de pieza | SC73C1402D | |
| Descripción | 4BIT MCU FOR REMOTE CONTROLLER | |
| Fabricantes | Silan Microelectronics | |
| Logotipo |  |
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SC73C1402
4-BIT MCU FOR REMOTE CONTROLLER(MASK TYPE)
DESCRIPTION
SC73C1402 is one of Silan’s 4-bit CMOS single-chip micro-
controllers for infrared remote control transmitters (IRCTs). It can
be implemented in various IRCT circuits by mask option.
SOP-20-300-1.27
FEATURES
* Operating voltage range: (2.0 ~ 4.0V)
Low static power consumption (<1uA)
SOP-20-375-1.27
* Program memory: 2Kx 9 bits
The last 1K areas can also be used as data table
* Data memory (RAM): 16 x 4 bits
* Timer/counter: 10~15 bits
SSOP-20-300-0.65
* 20 I/O ports, where there is a 4-bit input, two 4-bit outputs and
two 4-bit programmable input/output ports(P53 is output but ORDERING INFORMATION
not used as keypress).
* Oscillator frequency (fosc):
Device
Package
300KHz~2MHz or 2MHz~6MHz selectable by mask option
SC73C1402
SOP-24-375-1.27
* Operating frequency (fmain):
SC73C1402A SOP-20-300-1.27
fmain=fosc (when fosc in the range of 300KHz~2MHz)
SC73C1402B SSOP-20-300-0.65
fmain=fosc/8 (when fosc in the range of 2MHz~6MHz)
* Carrier frequency: fmain/12
* Carrier duty: 1/2 or 1/3 duty selectable by program
* Instruction cycle: 5/fmain
SC73C1402C
SC73C1402D
SC73C1402E
SOP-20-375-1.27
DIE
SSOP-24-300-0.65
* Handles various user’s codes, repeat key, persist-key press APPLICATIONS
www.DataSheet4Ua.ncdommany other functions
* Power on reset
* Supports voltage-drop detection
* Supports 56 keys in 20-pin package, and 80 keys in 24-pin
package.
* Infrared remote control devices, such
as TV, Video Cassette Recorder, VTR,
laser phonograph and acoustics
remote controllers.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.1 2005.12.19
Page 1 of 20
1 page  
SC73C1402
FUNCTION DESCRIPTION
1. PC: 11 bits
PC refers to program counter. The maximum addressing area is 2K bytes in ROM. The program counter
contains the address of the instruction that will be executed next. When reset, the value of the PC is cleared to
0. The PC is set to predefined value when one of the 3 following occasions occurs: 1) when the JUMP
instruction is executed; 2) when a subroutine call is back; 3) when a program call is back. In the SC73C1402,
all instructions are 1-byte OP Code instructions, PC increments by 1 each time an instruction is executed.
2. MBR
Memory buffer register (MBR) is the write-only, higher 4-bit of the program pointer. The ROM of the
SC73C1402 can be divided into 16 blocks. Each block has 128 bytes. These blocks can be addressed by the
MBR. When the program starts executing a branch instruction, it will load the corresponding value to the MBR
register, and then executes the command BSS label.
3. STACK
STACK refers to stack register (11 bits). It stores the previous value of program pointer during execution of
subroutine calls. Because there is only one-level hardware stack register, only one-level programs can be
called. When the user tries to make a nested two-level program call, an error will occur.
4. B, H, D
BHD refers to the pointers to data table. They are all 4-bit. The last 1K-byte area of ROM (400H~7FFH) can
also be used for data table. When addressing the data of the program in ROM, the registers act as the
pointers to the data table. In other cases, the H, D registers can be used as general purpose registers. Data
stored in the data table can be addressed by the 2 transmit instructions (see the following 2 instructions: LDL
A, @HD, and LDH A, @HD. When executing the above 2 transmit-instructions, the program searches the data
in the data table automatically. The lower 10-bit of the ROM is decided by the lower 2-bit of the B register, and
all bits of the H & D register.
When the BR [3] of B register is set to “1”, the carrier duty is 1/2; when BR [3] is set to “0”, then the carrier
www.DataSheet4U.com
duty is 1/3.
The BR [2] of B register is “1”, the carrier output port is opened, if BR [2]=0, the carrier output port is closed.
5. ROM
Address
000H
001H
002H
01FH
020H
3FFH
400H
7FFH
2k x 9bits
Reset address
Subroutine address
Program address
Data table and program multiplex areas
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.1 2005.12.19
Page 5 of 20
5 Page 
SC73C1402
k. OR A, @LR
l. XOR A, @LR
and the results are stored in the accumulator. SF changed, SF=/Z.
The accumulator content and the contents of RAM pointed at by the L register are
ORed and the results are entered in the accumulator. SF changed, SF=/Z.
The contents of the accumulator and RAM pointed at by the L register are XORed
and the results are stored in the accumulator. SF changed, SF=/Z.
4. Bit operation instructions
Instruction
CLR @LR, b
SET @LR, b
TEST @LR, b
Operation
RAM (LR) b←0
RAM (LR) b←1
SF←/RAM (LR) b
CF SF
--- 1
--- 1
--- *
Cycle
2
2
2
a. CLR @LR, b
b. SET @ LR, b
c. TEST @LR, b
Clear the B bit of the RAM pointed at by the LR register.
Set the B bit of the RAM pointed at by the LR register to be 1.
Test the B bit of the RAM pointed at by the LR register. If this bit is1, the SF is set to
0; otherwise, the SF is set to 1.
5. Carry operation instructions
Instruction
CLR CF
SET CF
TESTP CF
CF←0
CF←1
SF←CF
Operation
CF SF
01
11
--- *
Cycle
2
2
1
a. CLR CF
b. SET CF
c. TESTP CF
Clear the carry flag to logic zero.
Set the carry flag to logic 1.
Test the carry flag, sent the carry flag to SF.
www.DataSh6e.eBt4rUa.ncocmh instructions
Instruction
Operation
CF SF
Cycle
BSS label
LD MBR, #K
--- 1
--- ---
2
1
Only when SF is 1, the JUMP instruction is executed; otherwise it will execute the next instruction.
Notes:
a. Label
Jump destination address
b. #K
Immediate (0~15)
c. b
Bit addressing (0~3)
d. %P
Port address
7. Subroutine instructions
Instruction
Operation
CF SF
Cycle
CALLS label
RET
--- ---
--- ---
2
2
When executing subroutine call and return instructions, the subroutine starting address is limited from 000H
to 01FH
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:1.1 2005.12.19
Page 11 of 20
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| PDF Descargar | [ Datasheet SC73C1402D.PDF ] | |
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