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부품번호 | KLI-2113 기능 |
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기능 | Linear CCD Image Sensor | ||
제조업체 | ON Semiconductor | ||
로고 | |||
전체 18 페이지수
KLI-2113
Linear CCD Image Sensor
Description
The KLI−2113 Image Sensor is a high dynamic range, multispectral,
linear CCD image sensor ideally suited for demanding color scanner
applications.
The imager consists of three parallel 2098-element photodiode
arrays − one for each primary color. The KLI−2113 sensor offers high
sensitivity, a high data rate, low noise, and negligible lag. Independent
exposure control for each channel allows color balancing at the front
end. CMOS-compatible 5 V clocks, and single 12 V DC supply are all
that are required to drive the KLI−2113 sensor, simplifying the design
of interface electronics.
Table 1. GENERAL SPECIFICATIONS
Parameter
Typical Value
Architecture
3 Channel, RGB Tri-linear CCD
Pixels Count
2098 × 3
Pixel Size
14 mm (H) × 14 mm (V)
Pixel Pitch
14 mm
Inter-Array Spacing
112 mm (8 Lines Effective)
Active Image Size
29.37 mm (H) × 0.24 mm (V)
29.4 mm (Diagonal)
Saturation Signal
170,000 e−
Dynamic Range
76 dB
Responsivity (Wavelength)
R, G, B (−RAA)
R, G, B (−DAA)*
Mono (−AAA, −AAB)
Output Sensitivity
62, 42, 37 V/mJ/cm2
60, 40, 36 V/mJ/cm2
66 V/mJ/cm2
11.5 mV/e−
Dark Current
0.02 pA/Pixel
Dark Current Doubling Rate
9°C
Charge Transfer Efficiency
0.99999/Transfer
Photoresponse Non-Uniformity
5% Peak-Peak
Lag (First Field)
0.6%
Maximum Data Rate
20 MHz/Channel
Package
CERDIP (Sidebrazed, CuW)
Cover Glass
AR Coated, 2 Sides
* Configuration KLI-2113-DAA uses Gen1 color filter set and is not recommended
for new designs.
NOTE: Parameters above are specified at T = 25°C and 2 MHz clock rates unless
otherwise noted.
www.onsemi.com
Figure 1. KLI−2113 Linear CCD
Image Sensor
Features
• High Resolution
• Wide Dynamic Range
• High Sensitivity
• High Operating Speed
• High Charge Transfer Efficiency
• No Image Lag
• Electronic Exposure Control
• Pixel Summing Capability
• Up to 2.0 V Peak-Peak Output
• 5.0 V Clock Inputs
• Two-Phase Register Clocking
• On-Chip Dark Reference
Applications
• Digitization
• Machine Vision
• Mapping/Aerial
• Photography
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2015
November, 2015 − Rev. 5
1
Publication Order Number:
KLI−2113/D
KLI−2113
Charge Transport
Readout of the signal charge is accomplished by
two-phase, complementary clocking of the Phase 1 and
Phase 2 gates (f1 and f2) in the horizontal (output) shift
register. The register architecture has been designed for high
speed clocking with minimal transport and output signal
degradation, while still maintaining low (4.75 VP−P min)
clock swings for reduced power dissipation, lower clock
noise and simpler driver design. The data in all registers is
clocked simultaneously toward the output structures.
The signal is then transferred to the output structures in
a parallel format at the falling edge of the f2s clock.
Resettable floating diffusions are used for the charge to
voltage conversion while source followers provide
buffering to external connections. The potential change on
the floating diffusion is dependent on the amount of signal
charge and is given by DVFD = DQ / CFD, where DVFD is the
change in potential on the floating diffusion, DQ is the
amount of charge, and CFD is the capacitance of the floating
diffusion node. Prior to each pixel output, the floating
diffusion is returned to the RD level by the reset clock, fR.
www.onsemi.com
4
4페이지 TYPICAL PERFORMANCE CURVES
KLI−2113
(2 MHz Operation, Emitter Follower Buffered, 3/4 VSAT, Dark to Bright Transition)
VIDR Output
(1 V/DIV)
f2 Clock
(2 V/DIV)
Time (200 ns/DIV)
Figure 4. Output Waveforms
70
60
50
40
30
20
10
0
Wavelength (nm)
Figure 5. Typical Responsivity
www.onsemi.com
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7페이지 | |||
구 성 | 총 18 페이지수 | ||
다운로드 | [ KLI-2113.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
KLI-2113 | Linear CCD Image Sensor | ON Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |