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93C46A 데이터시트 PDF




FMD에서 제조한 전자 부품 93C46A은 전자 산업 및 응용 분야에서
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부품번호 93C46A 기능
기능 3-Wire Serial EEPROM
제조업체 FMD
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93C46A 데이터시트, 핀배열, 회로
Fremont Micro Devices
3-Wire Serial EEPROM
1K, 2K and 4Kbit (8-bit or 16-bit wide)
93C46/A, 93C56/A, 93C66/A
FEATURES
Standard Voltage and Low Voltage Operation:
FT93C46/56/66:
VCC = 2.5V to 5.5V
FT93C46A/56A/66A:
VCC = 1.8V to 5.5V
User Selectable Internal Organization:
FT93C46: 128 x 8 or 64 x 16
FT93C56: 256 x 8 or 128 x 16
FT93C66: 512 x 8 or 256 x 16
2 MHz Clock Rate (5V) Compatibility.
Industry Standard 3-wire Serial Interface.
Self-Timed ERASE/WRITE Cycles (5ms max including auto-erase).
Automatic ERAL before WRAL.
Sequential READ Function.
High Reliability: Typical 1 Million Erase/Write Cycle Endurance.
100 Years Data Retention.
Industrial Temperature Range (-40o C to 85o C).
Standard 8-pin PDIP/SOIC/TSSOP Pb-free Packages.
DESCRIPTION
The FT93C46/56/66 series are 1024/2048/4096 bits of serial Electrical Erasable and Programmable
Read Only Memory, commonly known as EEPROM. They are organized as 64/128/256 words of 16 bits
each when the ORG pin is connected to VCC (or unconnected) and 128/256/512 words of 8 bits (1 byte)
each when the ORG pin is tied to ground. The devices are fabricated with proprietary advanced CMOS
process for low power and low voltage applications. These devices are available in standard 8-lead
PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages. Our extended VCC range (1.8V to 5.5V)
devices enables wide spectrum of applications.
The FT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial
interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SCL). Upon receiving a READ
instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO.
The WRITE cycle is completely self-timed and no separate ERASE cycle is required before WRITE. The
WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. Once a device
begins its self-timed program procedure, the data out pin (DO) can indicate the READY/BUSY status by
rising chip select (CS).
© 2013 Fremont Micro Devices Inc.
Confidential Rev. 0.8
DS93CXX-A-page1




93C46A pdf, 반도체, 판매, 대치품
Fremont Micro Devices
93C46/A, 93C56/A, 93C66/A
MEMORY ORGANIZATION
The FT93C46/56/66 memory is organized either as bytes (x8) or as words (x16). If Internal Organization
(ORG) is unconnected (or connected to VCC) the words (x16) organization is selected; When Internal
Organization is connected to ground the bytes (x8) organization is selected.
INSTRUCTION SET for the FT93C46
Instruction
SB
Op
Code
READ
1 10
EWEN
1 00
EWDS
ERASE
WRITE
ERAL
WRAL
1 00
1 11
1 01
1 00
1 00
Address
x 8 x 16
A6 - A0
A5 - A0
11xxxxx 11xxxx
00xxxxx
A6 - A0
A6 - A0
10xxxxx
01xxxxx
00xxxx
A5 - A0
A5 - A0
10xxxx
01xxxx
Data
x 8 x 16
D7 - D0
D7 - D0
D15 - D0
D15 - D0
Comments
Reads data stored in memory,
at specified address.
Write enable must precede all
programming modes.
Disables all programming
instructions.
Erase memory location An - A0.
Writes memory location An - A0.
Erases all memory locations.
Writes all memory locations.
INSTRUCTION SET for the FT93C56 and FT93C66
Instruction
SB
Op
Code
Address
x 8 x 16
Data
x 8 x 16
Comments
READ
1 10
A8- A0
A7- A0
Reads data stored in memory,
at specified address.
EWEN
1 00 11xxxxxxx 11xxxxxx
Write enable must precede all
programming modes.
EWDS
1 00 00xxxxxxx 00xxxxxx
Disables all programming
instructions.
ERASE
WRITE
ERAL
1 11
A8- A0
A7- A0
Erase memory location An - A0.
1 01
A8- A0
A7- A0 D7 - D0 D15 - D0 Writes memory location An - A0.
1 00 10xxxxxxx 10xxxxxx
Erases all memory locations.
WRAL
.
1 00 01xxxxxxx 01xxxxxx D7 - D0 D15 - D0 Writes all memory locations.
(A) START BIT (SB)
Each instruction is preceded by a rising edge on Chip Select (CS) with Serial Clock (SCL) being held
Low.
(B) OPERATION CODE (OP-CODE)
Two op-code bits, read on Serial Data Input (DI) during the rising edge of Serial Clock (SCL).
(C) ADDRESS
The address bits of the byte or word that is to be accessed. For the FT93C46, the address is made
up of 6 bits for the x16 organization or 7 bits for x8 organization. For the FT93C56, the address is
made up of 7 bits for the x16 organization or 8 bits for x8 organization. For the FT93C66, the address
is made up of 8 bits for the x16 organization or 9 bits for x8 organization.
(D) DATA
The data bits of the byte or word that is to be accessed. For the FT93C46/56/66, the data is made up
of 16 bits (word) for the x16 organization or 8 bits (byte) for x8 organization.
© 2013 Fremont Micro Devices Inc.
Confidential Rev. 0.8
DS93CXX-A-page4

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93C46A 전자부품, 판매, 대치품
Fremont Micro Devices
93C46/A, 93C56/A, 93C66/A
ERASE Tim ing
CS
SCL
DI
An An+1
A1 A0
DO
START
B IT
WRITE Timing
OP
CODE
ADDR
Twc
CS
SCL
DI
An An+1
A1 A0 Dn Dn+1
D1 D0
DO
START
BIT
OP
CODE
ERAL Timing (1)
CS
SCL
DI
ADDR
DATA IN
xx
Twc
DO
START
BIT
OP
CODE
ADDR
Twc
© 2013 Fremont Micro Devices Inc.
Confidential Rev. 0.8
DS93CXX-A-page7

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