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LC717A10AJ 데이터시트 PDF




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부품번호 LC717A10AJ 기능
기능 Capacitance-Digital-Converter LSI
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LC717A10AJ 데이터시트, 핀배열, 회로
Ordering number : ENA2162
LC717A10AJ
CMOS LSI
Capacitance-Digital-Converter LSI
for Electrostatic Capacitive Touch
Sensors
http://onsemi.com
Overview
The LC717A10AJ is a high-performance and low-cost capacitance-digital-converter LSI for electrostatic capacitive
touch sensor, especially focused on usability.
It has 16 channels capacitance-sensor input. This makes it ideal for use in the products that need many switches.
Since the calibration function and the judgment of ON/OFF are automatically performed in LSI internal, it can make
development time more short. A detection result (ON/OFF) for each input can be read out by the serial interface (I2C
compatible bus or SPI).
Also, measurement value of each input can be read out as 8-bit digital data. Moreover, gain and other parameters can
be adjusted using serial interface.
Features
Detection system: Differential capacitance detection (Mutual capacitance type)
Input capacitance resolution: Can detect capacitance changes in the femto Farad order
Measurement interval (16 differential inputs): 30ms (Typ) (at initial configuration),
6ms (Typ) (at minimum interval configuration)
External components for measurement: Not required
Interface: I2C * compatible bus or SPI selectable.
Current consumption: 570μA (Typ) (VDD = 2.8V), 1.3mA (Typ) (VDD = 5.5V)
Supply voltage: 2.6V to 5.5V
Detection operations: Switch
Packages: SSOP30
* I2C Bus is a trademark of Philips Corporation.
Semiconductor Components Industries, LLC, 2013
August, 2013
Ver1.0.1
D1912HKPC 20121204-S00003 No.A2162-1/11




LC717A10AJ pdf, 반도체, 판매, 대치품
LC717A10AJ
I2C Compatible Bus Timing Characteristics at VSS = 0, VDD = 2.6 to 5.5V, Ta = -40 to +105°C
*Not tested at low temperature before shipment
Parameter
Symbol
Pin Name
Conditions
min
typ
max Unit
SCL clock frequency
fSCL
SCL
START condition hold time
tHD;STA
SCL
SDA
SCL clock low period
tLOW
SCL
SCL clock high period
tHIGH
SCL
Repeated START condition
setup time
tSU;STA
SCL
SDA
Data hold time
tHD;DAT
SCL
SDA
Data setup time
tSU;DAT
SCL
SDA
SDA, SCL rise/fall time
tr / tf
SCL
SDA
STOP condition setup time
tSU;STO
SCL
SDA
STOP-to-START bus release
tBUF
SCL
time SDA
*1) Design guarantee values (not tested before shipment)
0.6
1.3
0.6
0.6
0
100
0.6
1.3
400 kHz
μs
μs
μs
μs
0.9 μs
μs
300 μs
μs
μs
SPI Bus Timing Characteristics at VSS = 0, VDD = 2.6 to 5.5V, Ta = -40 to +105°C
*Not tested at low temperature before shipment
Parameter
Symbol
Pin Name
Conditions
min
typ
max
SCK clock frequency
fSCK
SCK
SCK clock Low time
tLOW
SCK
SCK clock High time
tHIGH
SCK
Input signal rise/fall time
tr / tf
nCS
SCK
SI
nCS setup time
tSU;NCS
nCS
SCK
SCK clock setup time
tSU;SCK
nCS
SCK
Data setup time
tSU;SI
SCK
SI
Data hold time
tHD;SI
SCK
SI
nCS hold time
tHD;NCS
nCS
SCK
SCK clock hold time
tHD;SCK
nCS
SCK
nCS standby pulse width
tCPH
nCS
Output high impedance time
from nCS
tCHZ
nCS
SO
Output data determination time tv
SCK
SO
Output data hold time
tHD;SO
SCK
SO
Output low impedance time
tCLZ
SCK
from SCK clock
SO
*1) Design guarantee values (not tested before shipment)
90
90
90
90
20
30
90
90
90
0
0
5
300
80
80
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Remarks
*1
*1
*1
*1
Remarks
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
No.A2162-4/11

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LC717A10AJ 전자부품, 판매, 대치품
Package Dimensions
unit : mm (typ)
3421
LC717A10AJ
[LC717A10AJ]
8.0
30
12
0.5 0.22 0.15
(0.5)
SANYO : SSOP30(225mil)
Pin Assignment
Pin No.
Pin Name
1 VDD
2 VSS
3 Non Connect *1
4 Cin4
5 Cin5
6 Cin6
7 Cin7
8 Cin8
9 Cin9
10 Cin10
11 Cin11
12 Cin12
13 Cin13
14 Cin14
15 Cin15
*1) connect to GND when mounted
Pin No.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Pin Name
Cref
CrefAdd
Cdrv
INTOUT
SA1
SCL/SCK
SDA/SI
SA0/SO
nCS
nRST
Non Connect *1
Cin0
Cin1
Cin2
Cin3
No.A2162-7/11

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