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PDF AT49F010 Data sheet ( Hoja de datos )
| Número de pieza | AT49F010 | |
| Descripción | 1-Megabit 5-volt Only CMOS Flash Memory | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Single Voltage Operation
- 5V Read
- 5V Reprogramming
Fast Read Access Time - 45 ns
• Internal Program Control and Timer
• 8K bytes Boot Block With Lockout
• Fast Erase Cycle Time - 10 seconds
•• Byte By Byte Programming - 10 µs/Byte
Hardware Data Protection
• DATA Polling For End Of Program Detection
•• Low Power Dissipation
- 30 mA Active Current
- 100 µA CMOS Standby Current
• Typical 10,000 Write Cycles
Description
The AT49F010/HF010 are 5-volt-only in-system programmable and erasable Flash
Memories. Their 1-megabit of memory is organized as 131,072 words by 8 bits. Manu-
factured with Atmel’s advanced nonvolatile CMOS technology, the devices offer ac-
cess times to 45 ns (HF version) with a power dissipation of just 165 mW over the
commercial temperature range. When the device is deselected, the CMOS standby
current is less than 100 µA.
To allow for simple in-system reprogrammability, the AT49F010/HF010 does not re-
quire high input voltages for programming. Five-volt-only commands determine the
read and programming operation of the device. Reading data out of the device is
similar to reading from an EPROM. Reprogramming the AT49F010/HF010 is per-
formed by erasing the entire 1 megabit of memory and then programming on a byte
by byte basis. The byte programming time is a fast 50 µs. The end of a program cycle
can be optionally detected by the DATA polling feature. Once the end of a byte pro-
Pin Configurations
Pin Name Function
A0 - A16 Addresses
CE Chip Enable
OE Output Enable
WE Write Enable
I/O0 - I/O7 Data Inputs/Outputs
NC No Connect
DIP Top View
(continued)
1-Megabit
(128K x 8)
5-volt Only
CMOS Flash
Memory
AT49F010
AT49HF010
AT49F010/HF010
PLCC Top View
TSOP Top View
Type 1
0852AX–5/97
1 page  
AT49F010/HF010
AC Read Characteristics
AT49HF010-45 AT49HF010-55 AT49F010-70
Symbol Parameter
Min Max Min Max Min Max
tACC Address to Output Delay
45
55
70
tCE (1)
CE to Output Delay
45 55 70
tOE (2) OE to Output Delay
25 30 35
tDF (3, 4) CE or OE to Output Float 0 25 0 25 0 25
Output Hold from OE,
tOH CE or Address,
0
0
0
whichever occurred first
AT49F010-90
Min Max
90
90
0 40
0 25
0
AT49F010-12
Min Max Units
120 ns
120 ns
0 50 ns
0 30 ns
0 ns
AC Read Waveforms (1, 2, 3, 4)
Notes: 1. CE may be delayed up to tACC - tCE after the address
transition without impact on tACC .
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE or by tACC - tOE
after an address change without impact on tACC .
3. tDF is specified from OE or CE whichever occurs first
(CL = 5 pF).
4. This parameter is characterized and is not 100% tested.
Input Test Waveforms and
Measurement Level
Output Test Load
45 ns / 55 ns
70/90/120 ns
tR, tF < 5 ns
Pin Capacitance (f = 1 MHz, T = 25°C) (1)
Typ Max
CIN 4 6
COUT
8 12
Note: 1. This parameter is characterized and is not 100% tested.
Units
pF
pF
Conditions
VIN = 0V
VOUT = 0V
5
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet AT49F010.PDF ] | |
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