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ISL6377 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ISL6377
기능 Multiphase PWM Regulator
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ISL6377 데이터시트, 핀배열, 회로
DATASHEET
Multiphase PWM Regulator for AMD Fusion™ Desktop
CPUs Using SVI 2.0
ISL6377
The ISL6377 is fully compliant with AMD Fusion™ SVI 2.0 and
provides a complete solution for microprocessor and graphics
processor core power. The ISL6377 controller supports two
Voltage Regulators (VRs) with three integrated gate drivers and
three optional external drivers for maximum flexibility. The Core
VR can be configured for 4-, 3-, 2-, or 1-phase operation while the
Northbridge VR supports 2- or 1-phase configurations. The two
VRs share a serial control bus to communicate with the AMD CPU
and achieve lower cost and smaller board area compared with
two-chip solutions.
The PWM modulator is based on Intersil’s Robust Ripple
Regulator R3™ technology. Compared to traditional modulators,
the R3 modulator can automatically change switching frequency
for faster transient settling time during load transients and
improved light-load efficiency.
The ISL6377 has several other key features. Both outputs
support DCR current sensing with single NTC thermistor for
DCR temperature compensation or accurate resistor current
sensing. Both outputs utilize remote voltage sense, adjustable
switching frequency, OC protection and power-good.
Applications
• AMD fusion CPU/GPU core power
• Desktop computers
Features
• Supports AMD SVI 2.0 serial data bus interface
- Serial VID clock frequency range 100kHz to 25MHz
• Dual output controller with integrated drivers
- Two dedicated core drivers
- One programmable driver for either core or Northbridge
• Precision voltage regulation
- 0.5% system accuracy over-temperature
- 0.5V to 1.55V in 6.25mV steps
- Enhanced load line accuracy
• Supports multiple current sensing methods
- Lossless inductor DCR current sensing
- Precision resistor current sensing
• Programmable 1-, 2-, 3- or 4-phase for the core output and
1- or 2-phase for the Northbridge output
• Adaptive body diode conduction time reduction
• Superior noise immunity and transient response
• Output current and voltage telemetry
• Differential remote voltage sensing
• High efficiency across entire load range
• Programmable slew rate
• Programmable VID offset and droop on both outputs
• Programmable switching frequency for both outputs
• Excellent dynamic current balance between phases
• Protection: OCP/WOC, OVP, PGOOD and thermal monitor
• Small footprint 48 Ld 6x6 QFN package
- Pb-free (RoHS compliant)
Core Performance
100
90
80
70
60
50
40
30
20
10
0
0
VIN = 12V
VIN = 8V
VOUT CORE = 1.1V
5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
FIGURE 1. EFFICIENCY vs LOAD
1.12
1.10
1.08
1.06
1.04
1.02
VIN = 12V
VIN = 8V
1.00
0.98 VOUT CORE = 1.1V
0.96 0 5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
FIGURE 2. VOUT vs LOAD
November 2, 2015
FN8336.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2012, 2015. All Rights Reserved
Intersil (and design) and R3 Technology are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.




ISL6377 pdf, 반도체, 판매, 대치품
ISL6377
Simplified Application Circuit with 3 Internal Drivers Used for Core
+12V
NB_PH1
NB_PH2
VNB1
VNB2
NB_PH1
NB_PH2
Ri
Cn NTC
**
*OPTIONAL
VNB_SENSE
THERMAL INDICATOR
µP
ISEN1_NB
ISEN2_NB
ISUMN_NB
ISUMP_NB
PWM_Y
FCCM_NB
COMP_NB
FB_NB
VSEN_NB
PWM2_NB
IMON_NB
NTC_NB
VR_HOT_L
PWROK
SVT
SVD
SVC
VDDIO
IMON
NTC
COMP
ISL6377
PWM4
BOOTX
UGATEX
PHASEX
LGATEX
NB_PH1
VNB
VNB1
+12V
NB_PH2
VNB2
+12V
PH4
+12V
V04
PH3
V03
**
*OPTIONAL
VCORE_SENSE
PH1
PH2
PH3
PH4
VO1
VO2
VO3
VO4
Ri
Cn
NTC
FB
VSEN
RTN
ISEN1
ISEN2
ISEN3
ISEN4
ISUMN
ISUMP
BOOT2
UGATE2
PHASE2
LGATE2
BOOT1
UGATE1
PHASE1
LGATE1
+12V
PH2
+12V
VCORE
VO2
PH1
VO1
FIGURE 4. TYPICAL APPLICATION CIRCUIT USING INDUCTOR DCR SENSING
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ISL6377 전자부품, 판매, 대치품
Pin Configuration
ISL6377
ISL6377
(48 LD QFN)
TOP VIEW
ISEN2_NB 1
NTC_NB 2
IMON_NB 3
SVC 4
VR_HOT_L 5
SVD 6
VDDIO 7
SVT 8
ENABLE 9
PWROK 10
NTC 11
ISEN4 12
48 47 46 45 44 43 42 41 40 39 38 37
GND
(BOTTOM PAD)
36 BOOTX
35 PWM4
34 BOOT2
33 UGATE2
32 PHASE2
31 LGATE2
30 VDDP
29 VDD
28 PWM_Y
27 LGATE1
26 PHASE1
25 UGATE1
Pin Descriptions
PIN NUMBER
1
SYMBOL
ISEN2_NB
2 NTC_NB
3 IMON_NB
4 SVC
5 VR_HOT_L
6 SVD
7 VDDIO
8 SVT
9 ENABLE
10 PWROK
11 NTC
12 ISEN4
13 ISEN3
DESCRIPTION
Individual current sensing for Channel 2 of the Northbridge VR. When ISEN2_NB is pulled to +5V, the
controller will disable Channel 2 and the Northbridge VR will run single-phase.
Thermistor input to VR_HOT_L circuit to monitor Northbridge VR temperature.
Northbridge output current monitor. A current proportional to the Northbridge VR output current is
sourced from this pin.
Serial VID clock input from the CPU processor master device.
Thermal indicator signal to AMD CPU. Thermal overload open-drain output indicator active LOW.
Serial VID data bidirectional signal from the CPU processor master device to the VR.
VDDIO is the processor memory interface power rail and this pin serves as the reference to the controller
IC for this processor I/O signal level.
Serial VID Telemetry (SVT) data line input to the CPU from the controller IC. Telemetry and VID-on-the-fly
complete signal provided from this pin.
Enable input. A high level logic on this pin enables both VRs.
System power-good input. When this pin is high, the SVI 2 interface is active and the I2C protocol is
running. While this pin is low, the SVC and SVD input states determine the pre-PWROK metal VID. This
pin must be low prior to the ISL6377 PGOOD output going high per the AMD SVI 2.0 Controller Guidelines.
Thermistor input to VR_HOT_L circuit to monitor Core VR temperature.
ISEN4 is the individual current sensing for Channel 4. When ISEN4 is pulled to +5V, the controller disables
Channel 4 and the Core VR runs in three-phase mode.
ISEN3 is the individual current sensing for Channel 3. When ISEN3 is pulled to +5V, the controller disables
Channel 3 and the Core VR runs in two-phase mode.
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ISL6377

Multiphase PWM Regulator

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