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PDF BR25H128-2AC Data sheet ( Hoja de datos )
| Número de pieza | BR25H128-2AC | |
| Descripción | Operation SPI BUS EEPROM | |
| Fabricantes | ROHM Semiconductor | |
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Datasheet
Serial EEPROM Series Automotive EEPROM
125°C Operation SPI BUS EEPROM
BR25H128-2AC
General Description
BR25H128-2AC is a 128Kbit Serial EEPROM of SPI BUS interface method.
Features
■ SPI BUS interface (CPOL, CPHA)=(0,0), (1,1)
■ Voltage Range
: 2.5V to 5.5V
■ Operating Range
: -40°C to +125°C
■ Clock Frequency
: 10MHz(Max)
■ Write Time
: 4ms(Max)
■ Page Size
: 64bytes
■ Bit Format
: 16384 x 8bit
■ 64bytes Write Lockable Identification Page (ID Page)
■ Address Auto Increment Function at Read Operation
■ Auto Erase and Auto End Function at Data Rewrite
■ Write Protect Block Setting by Software
Memory Array 1/4, 1/2, Whole
■ HOLD Function by HOLDB Pin
■ Low Supply Current
Write Operation (5V) : 1.0mA (Typ)
Read Operation (5V) : 1.2mA (Typ)
Standby State(5V) : 0.1µA (Typ)
■ Prevention of Write Mistake
Write prohibition at Power On
Write prohibition by WPB Pin
Write prohibition Block Setting
Prevention of Write Mistake at Low Voltage
■ Write Cycles : 1,000,000 Write Cycles (Ta≤85°C)
: 500,000 Write Cycles (Ta≤105°C)
: 300,000 Write Cycles (Ta≤125°C)
■ Data Retention : 100 Years (Ta≤25°C)
: 60 Years (Ta≤105°C)
: 50 Years (Ta≤125°C)
■ Data at Shipment
Memory Array
：FFh
ID Page First 3 Addresses ：2Fh, 00h, 0Eh
Other Addresses ：FFh
Status Register WPEN, BP1, BP0 ：0, 0, 0
Lock Status LS
：0
■ TSSOP-B8, SOP8, SOP-J8 Packages
■ AEC-Q100 Qualified
Packages W(Typ) x D(Typ) x H(Max)
TSSOP-B8
SOP8
3.00mm x 6.40mm x 1.20mm 5.00mm x 6.20mm x 1.71mm
SOP-J8
4.90mm x 6.00mm x 1.65mm
〇Product structure : Silicon monolithic integrated circuit
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
〇This product has no designed protection against radioactive rays
1/35
TSZ02201-0R1R0G100190-1-2
18.Aug.2014 Rev.001
1 page  
BR25H128-2AC
Datasheet
Serial Input / Output Timing
tCS
CSB
tSCKS
SCK
SI
SO
tCSS
tSCKWL tSCKWH
tDIS tDIH
High-Z
Figure 2. Input Timing
tRC tFC
SI is taken into IC inside in sync with data rise edge of SCK. Input address and data from the Most Significant Bit MSB.
tCS
CSB
tCSH tSCKH
SCK
SI
tPD tOH
SO
tRO,tFO tOZ
High-Z
Figure 3. Input / Output Timing
SO is output in sync with data fall edge of SCK. Data is output from the Most Significant Bit MSB.
"H"
CSB
"L"
SCK
tHFS tHFH
SI n+1
SO Dn+1
tHOZ
Dn
tHRS tHRH
High-Z
tDIS
n
tHPD
Dn
n-1
Dn-1
HOLDB
Figure 4. HOLD Timing
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/35
TSZ02201-0R1R0G100190-1-2
18.Aug.2014 Rev.001
5 Page 
BR25H128-2AC
Typical Performance Curves - continued
Datasheet
50
Ta= -40°C
Ta= 25°C
Ta= 125°C
40
30
20
10
SPEC
SPEC
50
Ta= -40°C
Ta= 25°C
Ta= 125°C
40
30
20
10
SPEC
SPEC
0
0
12345
SUPPLY VOLTAGE : Vcc［V］
Figure 23. SI Setup Time tDIS
6
0
0
12345
SUPPLY VOLTAGE : Vcc［V］
Figure 24. SI Hold Time tDIH
6
100
80
Ta= -40°C
Ta= 25°C
Ta= 125°C
60
40
20
SPEC
SPEC
100
80
Ta= -40°C
Ta= 25°C
Ta= 125°C
60
40
20
SPEC
SPEC
0
0
12345
SUPPLY VOLTAGE : Vcc［V］
6
Figure 25. Data Output Delay Time1 tPD1 (CL1=100pF)
0
0
1 2 34 5
SUPPLY VOLTAGE : Vcc［V］
6
Figure 26. Data Output Delay Time2 tPD2 (CL2=30pF)
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/35
TSZ02201-0R1R0G100190-1-2
18.Aug.2014 Rev.001
11 Page | ||
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