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PDF AP1153ADS15 Data sheet ( Hoja de datos )

Número de pieza AP1153ADS15
Descripción 14V Input / 100mA Output LDO Regulator
Fabricantes AKM 
Logotipo AKM Logotipo



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No Preview Available ! AP1153ADS15 Hoja de datos, Descripción, Manual

[AP1153ADSXX]
AP1153ADSXX
14V Input / 100mA Output LDO Regulator
1. General Description
The AP1153ADSXX is a low dropout linear regulator with ON/OFF control, which can supply 100mA load
current. The IC is an integrated circuit with a silicon monolithic bipolar structure. The output voltage, trimmed
with high accuracy, is available from 1.3 to 5.0V in 0.1V steps. The output capacitor is available to use a small
0.22μF ceramic capacitor. The over current, thermal and reverse bias protections are integrated, and also the
package is small and thin type. The IC is designed for space saving requirements.
2. Feature
Available to use a small 0.22μF ceramic capacitor
Dropout Voltage
Output Current
VDROP=160mV at 100mA
100mA
High Precision output voltage 1.5% or 50mV
High ripple rejection ratio 80dB at 1kHz
70dB at 10kHz
Wide operating voltage range 2.1V to 14.0V
Very low quiescent current
On/Off control (High active)
IQUT=75A at IOUT=0mA
Built-in Short circuit protection, thermal shutdown
Built-in reverse bias over current protection
Available very low noise application
Very small surface mount package SOT23-5
Automotive accessory equipment
Any Electronic Equipment
Battery Powered Systems
Mobile Communication
3. Application
015000869-E-00
-1-
2015/01

1 page




AP1153ADS15 pdf
7. Pin Configurations and Functions
Pin Configurations
54
(Top View)
1 23
[AP1153ADSXX]
Functions
Pin No.
Pin
Description
1 VCONT
Internal Equivalent Circuit
Vcont
1
320k
500k
Description
On/Off Control Terminal
Vcont > 1.8V : ON
Vcont < 0.35V : OFF
The pull-down resister (500k) is built-in.
2 GND
Np
3
3 NP
-
GND Terminal
Noise Bypass Terminal
Connect a bypass capacitor between GND.
Vout
Vin 4
4 VOUT
5 VIN
015000869-E-00
Output Terminal
Vref
-
Input Terminal
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2015/01

5 Page





AP1153ADS15 arduino
11.1 DC Characteristics
Line Regulation
[AP1153ADSXX]
11. Description
Test conditions
Vin
=VoutTYP+1V
Vin Vout
Iout=5mA
Cin
1.0F
Vcont Np
Cout
1.0F
Vcont
1.8V
Cnp
0.001F
Iin vs VIN
Iout=0mA
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8 Vout=
0.6 1.5,2.0,3.0,4.0,5.0V
0.4
0.2
0.0
0 2 4 6 8 10 12 14 16
Vin (V)
Load Regulation
Quiescent Current
Iout=0mA
Peak Output Current
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
Vout= 5.0V
4.0V
3.0V
2.0V
1.5V
50 100 150 200 250 300
Iout (mA)
015000869-E-00
- 11 -
2015/01

11 Page







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