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AOZ8005 데이터시트 PDF




Alpha & Omega Semiconductors에서 제조한 전자 부품 AOZ8005은 전자 산업 및 응용 분야에서
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부품번호 AOZ8005 기능
기능 Ultra-Low Capacitance TVS Diode Array
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AOZ8005 데이터시트, 핀배열, 회로
AOZ8005
Ultra-Low Capacitance TVS Diode Array
General Description
The AOZ8005 is a transient voltage suppressor array
designed to protect high speed data lines such as HDMI
and Gigabit Ethernet from damaging ESD events.
This device incorporates eight surge rated, low capaci-
tance steering diodes and a TVS in a single package.
During transient conditions, the steering diodes direct the
transient to either the positive side of the power supply
line or to ground.
The AOZ8005 provides a typical line to line capacitance
of 0.47pF and low insertion loss up to 2GHz providing
greater signal integrity making it ideally suited for HDMI
1.3 applications, such as Digital TVs, DVD players,
set-top boxes and mobile computing devices.
The AOZ8005 comes in tiny SOT-23-6 and MSOP-10
packages and is rated -40°C to +85°C junction tempera-
ture range.
The MSOP package features a flow through layout
design.
Features
ESD protection for high-speed data lines:
IEC 61000-4-2, level 4 (ESD) immunity test
±15kV (air discharge) and ±8kV (contact discharge)
Human Body Model (HBM) ±15kV
Array of surge rated diodes with internal TVS diode
Small package saves board space
Protects four I/O lines
Low capacitance between I/O lines: 0.47pF
Low clamping voltage
Low operating voltage: 5.0V
Applications
HDMI ports
Monitors and flat panel displays
Set-top box
USB 2.0 power and data line protection
Video graphics cards
Digital Video Interface (DVI)
10/100/1000 Ethernet
Notebook computers
Typical Application
AOZ8005
AOZ8005
TX2+
TX2-
TX1+
HDMI TX1-
Transmitter
TX0+
TX0-
CLK+
CLK-
Connector Connector
RX2+
RX2-
RX1+
RX1-
RX0+
RX0-
HDMI
Receiver
CLK+
CLK-
Rev. 2.5 December 2009
AOZ8005
Figure 1. HDMI Ports
www.aosmd.com
AOZ8005
Page 1 of 14




AOZ8005 pdf, 반도체, 판매, 대치품
AOZ8005
Typical Operating Characteristics
Clamping Voltage vs. Peak Pulse Current
(tperiod = 100ns, tr = 1ns)
17
16
15
14
13
12
11
10
0 2 4 6 8 10 12
Peak Pulse Current (A)
Forward Voltage vs. Forward Current
(tperiod = 100ns, tr = 1ns)
7
6
5
4
3
2
1
0
0 2 4 6 8 10 12
Forward Current (A)
Capacitance vs. Reverse Voltage
1.5
VP = Floating
1
VP = 3.3V
0.5
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Reverse Volts, Vr (V)
3
0
-3
-6
-9
-12
1
Insertion Loss vs. Frequency
VP = Floating
-3dB
2,340MHz
10 100 1,000
Frequency (MHz)
10,000
21
18
15
12
9
6
3
0
-3
-6
-9
-12
-15
-18
-21
1
I/O – Gnd Insertion Loss vs. Frequency
VP = Floating
VP = 3.3V
10 100
Frequency (MHz)
1000
ESD Clamping
8kV Contact per IEC61000-4-2
Note: Data was taken with a 10X attenuator
Rev. 2.5 December 2009
www.aosmd.com
Page 4 of 14

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AOZ8005 전자부품, 판매, 대치품
AOZ8005
X
Zo = 61Ω
Z1
Zo = 61Ω
C(TVS)
Figure 6. 140Differential Impedance
Max 102, Min 92
K = Z-Z---10--
Figure 7.
X
=
Z----0----C--τ--T---V----S--⎠⎞
-K----2--K--–-----1-⎠⎞
(5)
(6)
Figure 7. 160Differential Impedance
Max 123, Min 109
140
120
Max.
100
Min.
80
60
40
20
0
50 55 60 65 70 75 80
Common Mode Impedance (Ω)
Figure 8. Differential Impedance
By adding a TVS onto the traces it can have a large
effect on the impedance of the line. This addition of a
capacitance added to a 100differential transmission
line without any compensation may decrease the
impedance as much as 20or more. Below is a formula
to calculate the length for the compensation of C(TVS).
Z0 is the normal 61differential impedance on the trace.
Z1 is the needed impedance to compensate for the
added C(TVS)
K is defined as the unloaded impedance of the adjusted
trace.
X is the length of the trace needed for the compensation.
τ is the propagation delay time required for a signal to
travel from one point to another. This value should be
less than 200pS.
From the above method the designer should layout the
boards with a 50common mode trace. The result
should give you approximately 100differential imped-
ance. Z1 is the impedance that you choose in order to
compensate the TVS capacitance. Based on Z1 value,
we can get the length of the segment from the above
equations. With the value of Z1 = 80, Zo = 61,
C(TVS) = 0.94 and τ = 180. The X(mils) equates to
580 mils.
Page 8 has a series of graph that represent changing
width and length of the trace from 50to 80in
increment of 10with a MSOP-10 package solder onto
the board. As you can observe from the graphs, a small
incremental capacitance that is added to the differential
lines can significantly decrease the differential imped-
ance. Thus violated the HDMI specification of
100±15%.
Rev. 2.5 December 2009
www.aosmd.com
Page 7 of 14

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