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PDF A5976 Data sheet ( Hoja de datos )
| Número de pieza | A5976 | |
| Descripción | Microstepping DMOS Driver | |
| Fabricantes | Allegro | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de A5976 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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A5976
Microstepping DMOS Driver with Translator
FEATURES AND BENEFITS
• ±2.8 A, 40 V output rating
• Low RDS(on) outputs, 0.22 Ω source, 0.15 Ω sink typical
• Automatic current decay mode detection/selection
• 3 to 5.5 V logic supply voltage range
• Mixed, fast, and slow current decay modes
• Fault output
• Mixed decay for both rising/falling step option
• Synchronous rectification for low power dissipation
• Internal UVLO and thermal shutdown circuitry
• Crossover-current protection
• Short-to-ground protection
• Short-to-VBB protection
• Shorted load protection
Package: 28-lead TSSOP (suffix LP) with
exposed thermal pad
Not to scale
DESCRIPTION
The A5976 is a complete microstepping motor driver with
built-in translator. It is designed to operate bipolar stepper
motors in full-, half-, quarter-, and sixteenth-step modes, with
output drive capability of 40 V and ±2.8 A. TheA5976 includes
a fixed off-time current regulator that has the ability to operate in
slow-, fast-, or mixed-decay modes. This current-decay control
scheme results in reduced audible motor noise, increased step
accuracy, and reduced power dissipation.
The translator is the key to the easy implementation of the
A5976. Simply inputting one pulse on the STEPinput drives the
motor one step (two logic inputs determine if it is a full-, half-,
quarter-, or sixteenth-step). There are no phase sequence tables,
high-frequency control lines, or complex interfaces to program.
The A5976 interface is an ideal fit for applications where a
complex microprocessor is unavailable or overburdened.
Internal synchronous rectification control circuitry is provided
to improve power dissipation during PWM operation. Internal
circuit protection includes thermal shutdown with hysteresis,
undervoltage lockout (UVLO), and crossover-current
protection. Special power-up sequencing is not required.
The A5976 is supplied in a thin (<1.2 mm) 28-pin TSSOP
with an exposed thermal pad (suffix LP). The package is lead
(Pb) free (suffix -T), with 100% matte-tin leadframe plating.
Logic
Supply
Microcontroller
or
Controller Logic
Typical Application
VDD
REF
PFD
FAULTn
STEP
DIR
RESETn
SLEEPn
ENABLEn
MS1
MS2
DECAY
RC1
RC2
VREG
A5976
CP1
CP2
VCP
VBB1
VBB2
OUT1A
OUT1B
SENSE1
SENSE2
OUT2A
OUT2B
GND
PGND
Load
Supply
100 µF
A5976-DS, Rev. 2
1 page  
A5976
Microstepping DMOS Driver with Translator
ELECTRICAL CHARACTERISTICS1: Valid at TA = 25°C, VBB = 40 V, unless otherwise noted
Characteristics
Symbol
Test Conditions
Min.
Load Supply Voltage Range
Operating
VBB During sleep mode
8
0
Output Leakage Current
Output On-Resistance
Body Diode Forward Voltage
VBB Supply Current
IDSS
RDS(On)
VF
IBB
VOUT = VBB
VOUT = 0 V
Source driver, IOUT = –2.5 A, TJ = 25°C
Sink driver, IOUT = 2.5 A, TJ = 25°C
Source diode, IF = –2.5 A
Source diode, IF = 2.5 A
fPWM < 50 kHz, duty cycle = 50%
Operating, outputs disabled
Sleep mode
–
–
–
–
–
–
–
–
–
VDD Supply Current
fPWM < 50 kHz, duty cycle = 50%
IDD Operating, outputs disabled
Sleep mode
–
–
–
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
Logic Input Current
Maximum Step Frequency3
FAULTn Output Voltage
Blank Time
Fixed Off-Time
Reference Input Voltage Range
Reference Input Current
Gain (Gm) Error4
Crossover Dead Time
Motor Output Slew Time
Protection Circuits
VDD
VIN(1)
VIN(0)
IIN(1)
IIN(0)
fSTEP
VOL
tBLANK
tOFF
VREFx
IREF
EG
tDT
tSR
Operating
VIN = 0.7 × VDD
VIN = 0.3 × VDD
IOL = 1 mA
RT = 56 kΩ, CT = 680 pF
RT = 56 kΩ, CT = 680 pF
Operating
VREF = 2 V, phase current = 100.0%
VREF = 2 V, phase current = 70.7%
VREF = 2 V, phase current = 38.3%
10% to 90% rising; 90% to 10% falling
3
0.7× VDD
–
–20
–20
500
–
700
30
0
–
–
–
–
100
20
VDD UVLO Threshold
VDD UVLO Hysteresis
Overcurrent Protection Threshold
Overcurrent Protection Blank Time
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
VUV(VBB)
VUV(VBB)HYS
IOCPST
tBLANK(OC)
TJSD
TJSDHYS
VBB rising
2.45
50
3.5
–
155
–
Typ.2
–
–
<1
<1
0.22
0.15
1
1
–
–
<1
–
–
<1
–
–
–
<1
<1
–
–
950
38
–
–
–
–
–
475
–
2.7
100
–
1.5
165
15
Max.
40
40
20
–20
0.30
0.24
1.4
1.4
8
6
20
12
10
20
Units
V
V
µA
µA
Ω
Ω
V
V
mA
mA
μA
mA
mA
μA
5.5
–
0.3 ×VDD
20
20
–
0.5
1200
46
VDD
±3
±5
±5
±10
800
120
V
V
V
µA
µA
kHz
V
ns
μs
V
μA
%
%
%
ns
ns
2.95 V
– mV
–A
– µs
175 °C
– °C
1 Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual units, within
the specified maximum and minimum limits.
2 Negative current is defined as coming out of (sourcing from) the specified device pin.
3 Operation at a step frequency greater than the specified minimum value is possible but not warranteed.
4 EG = ( [ VREF / 8] – VSENSE ) / ( VREF / 8 ).
Allegro MicroSystems, LLC
5
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5 Page 
A5976
Microstepping DMOS Driver with Translator
IOUT2(A→B)
5
7 70%
3
9
70%
1
IOUT1(A→B)
11 15
13
Figure 4: Quarter Step
MS2 = H, MS1 = L, DIR = H. See Table 2 for step number detail.
IOUT2(A→B)
17
25 70%
9
33
1
70%
IOUT1(A→B)
41 57
49
Figure 5: Sixteenth Step
MS2 = H, MS1 = H, DIR = H. See Table 2 for step number detail.
Allegro MicroSystems, LLC
11
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet A5976.PDF ] | |
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