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CYW20736 데이터시트 PDF




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부품번호 CYW20736 기능
기능 Single-Chip Bluetooth Low Energy-Only System-On-Chip
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CYW20736 데이터시트, 핀배열, 회로
CYW20736
Single-Chip Bluetooth Low Energy-Only
System-On-Chip with Support for Wireless Charging
The Cypress CYW20736 is a an advanced Bluetooth Low Energy (aka Bluetooth Smart) SoC that supports wireless charging. The
CYW20736 is designed to support the entire spectrum of Bluetooth Smart use cases for the medical, home automation, accessory,
sensor, Internet Of Things, and wearable market segments.
The CYW20736 radio has been designed to provide low power, low cost, and robust communications for applications operating in the
globally available 2.4 GHz unlicensed Industrial, Scientific, and Medical (ISM) band.
The single-chip Bluetooth low energy SoC is a monolithic component implemented in a standard digital CMOS process and requires
minimal external components to make a fully compliant Bluetooth device. The CYW20736 is available in a 32-pin,
5 mm × 5 mm 32-QFN package as well as WLCSP and die packages.
Cypress Part Numbering Scheme
Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion,
there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides
Cypress ordering part number that matches an existing IoT part number.
Table 1. Mapping Table for Part Number between Broadcom and Cypress
Broadcom Part Number
BCM20736
BCM20736A1KML2G
BCM20736A1KWBGT
Cypress Part Number
CYW20736
CYW20736A1KML2G
CYW20736A1KWBGT
Features
The following profiles are supported1 in ROM:
Battery status
Blood pressure monitor
Find me
Heart rate monitor
Proximity
Thermometer
Weight scale
Time
Additional profiles that can be supported1 from RAM include:
Blood glucose monitor
Temperature alarm
Location
Applications
Alliance for Wireless Power (A4WP) wireless charging
Bluetooth Low Energy (BLE)-compliant
Infrared modulator
IR learning
Supports Adaptive Frequency Hopping
Excellent receiver sensitivity
10-bit auxiliary ADC with nine analog channels
On-chip support for serial peripheral interface (master and
slave modes)
Broadcom Serial Communications interface (compatible with
NXP I2C slaves)
Programmable output power control
Integrated ARM Cortex-M3 based microprocessor core
Automation Profile
Support for secure OTA
On-chip power-on reset (POR)
Support for EEPROM and serial flash interfaces
Integrated low-dropout regulator (LDO)
On-chip software controlled power management unit
Package type:
32-pin 32-QFN package (5 mm × 5 mm)
80-pin WLCSP package (2104 µm × 2085 µm)
RoHS compliant
1. Full qualification and use of these profiles may require FW updates from Cypress. Some of these profiles are under development/approval at the Cypress SIG and
conformity with the final approved version is pending. Contact your supplier for updates and the latest list of profiles.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-14883 Rev. *G
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 30, 2016




CYW20736 pdf, 반도체, 판매, 대치품
CYW20736
1. Functional Description
1.1 Bluetooth Baseband Core
The Bluetooth Baseband Core (BBC) implements all of the time-critical functions required for high performance Bluetooth operation.
The BBC manages the buffering, segmentation, and data routing for all connections. It also buffers data that passes through it, handles
data flow control, schedules ACL TX/RX transactions, monitors Bluetooth slot usage, optimally segments and packages data into
baseband packets, manages connection status indicators, and composes and decodes HCI packets. In addition to these functions, it
independently handles HCI event types and HCI command types.
The following transmit and receive functions are also implemented in the BBC hardware to increase TX/RX data reliability and security
before sending over the air:
Receive Functions: symbol timing recovery, data deframing, forward error correction (FEC), header error control (HEC), cyclic
redundancy check (CRC), data decryption, and data dewhitening.
Transmit Functions: data framing, FEC generation, HEC generation, CRC generation, link key generation, data encryption, and data
whitening.
1.1.1 Frequency Hopping Generator
The frequency hopping sequence generator selects the correct hopping channel number depending on the link controller state,
Bluetooth clock, and device address.
1.1.2 E0 Encryption
The encryption key and the encryption engine are implemented using dedicated hardware to reduce software complexity and provide
minimal processor intervention.
1.1.3 Link Control Layer
The link control layer is part of the Bluetooth link control functions that are implemented in dedicated logic in the Link Control Unit
(LCU). This layer consists of the Command Controller, which takes software commands, and other controllers that are activated or
configured by the Command Controller to perform the link control tasks. Each task performs a different Bluetooth link controller state.
STANDBY and CONNECTION are the two major states. In addition, there are five substates: page, page scan, inquiry, and inquiry
scan.
1.1.4 Adaptive Frequency Hopping
The CYW20736 gathers link quality statistics on a channel-by-channel basis to facilitate channel assessment and channel map
selection. The link quality is determined by using both RF and baseband signal processing to provide a more accurate frequency hop
map.
Document Number: 002-14883 Rev. *G
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CYW20736 전자부품, 판매, 대치품
CYW20736
1.4 Wireless Charging
The CYW20736 includes support for wireless charging in hardware, software, and firmware. It supports the protocol for implementing
wireless charging solutions based on the specifications written by the Alliance for Wireless Power (A4WP).
The A4WP protocol is embedded in the CYW20736. Hardware and firmware elements required for wireless charging are either
implemented in the CYW20736 or can be obtained through a Cypress technical support representative (see IoT Resources on page 4).
An end-to-end charging solution comprises of the following:
Power Transmitting Unit (PTU): The PTU transfers the power to the receiving unit. The receiving unit is any device (phone, wearable,
or other embedded device) that needs to be charged. The PTU is typically plugged into a power source such as a wall outlet. The
CYW20736 includes the peripherals needed to implement and drive a reference charging circuit and otherwise requires only a few
external components. PTU reference designs based on the CYW20736, including bills of material (BOMs), are available through
Cypress technical support. Depending on charging power requirements, a Power Management Unit (PMU) such as the CYW8935X
may be included in the design. However, most PTUs requiring < 5W will not need a PMU. The references designs leverage ADCs,
PWMs, and other internal peripherals to help drive the charging circuitry for energy transfer as well as provide feedback for charging
control. The application and algorithm that drive the reference designs are available on request.
Power Receive Unit (PRU): The PRU receives energy from the PTU to charge the local device, and is typically embedded in the
local device. Like the PTU, a separate PMU may or may not be needed depending on power requirements. PRU reference designs
based on the CYW20736, both with and without a PMU, are also available through Cypress technical support.
1.5 ADC Port
The CYW20736 contains a 16-bit ADC (effective number of bits is 10).
Additionally:
There are 9 analog input channels in the 32-pin package
The following GPIOs can be used as ADC inputs:
P0
P1
P8/P33 (select only one)
P11
P12
P13/P28 (select only one)
P14/P38 (select only one)
P15
P32
The conversion time is 10 μs.
There is a built-in reference with supply- or bandgap-based reference modes.
The maximum conversion rate is 187 kHz.
There is a rail-to-rail input swing.
The ADC consists of an analog ADC core that performs the actual analog-to-digital conversion and digital hardware that processes
the output of the ADC core into valid ADC output samples. Directed by the firmware, the digital hardware also controls the input
multiplexers that select the ADC input signal Vinp and the ADC reference signals Vref.
The ADC input range is selectable by firmware control:
When an input range of 0–3.6V is used, the input impedance is 3 M.
When an input range of 0–2.4V is used, the input impedance is 1.84 M.
When an input range of 0–1.2V is used, the input impedance is 680 k.
ADC modes are defined in Table 2.
Document Number: 002-14883 Rev. *G
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