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부품번호 | S6E2H44F0A 기능 |
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기능 | Microcontroller | ||
제조업체 | Cypress Semiconductor | ||
로고 | |||
전체 30 페이지수
S6E2H4 Series
32-bit ARM® Cortex®-M4F
FM4 Microcontroller
Devices in the S6E2H4 Series are highly integrated 32-bit microcontrollers with high performance and competitive cost. These
series is based on the ARM Cortex-M4F Processor with on-chip Flash memory and SRAM. The series has peripheral functions such
as Motor Control Timers, ADCs and Communication Interfaces (CAN, UART, CSIO, I2C, LIN).
Features
32-bit ARM Cortex-M4F Core
Processor version: r0p1
Up to 160 MHz Frequency Operation
FPU built-in
Support DSP instruction
Memory Protection Unit (MPU): improves the reliability of an
embedded system
Integrated Nested Vectored Interrupt Controller (NVIC): 1
NMI (non-maskable interrupt) and 128 peripheral interrupts
and 16 priority levels
24-bit System timer (Sys Tick): System timer for OS task
management
On-chip Memories
Flash memory
These series are based on two independent on-chip Flash
memories.
MainFlash memory
• Up to 512 Kbytes
• Built-in Flash Accelerator System with 16 Kbytes trace
buffer memory
• The read access to Flash memory can be achieved
without wait-cycle up to operation frequency of 72 MHz.
Even at the operation frequency more than 72 MHz, an
equivalent access to Flash memory can be obtained by
Flash Accelerator System.
• Security function for code protection
WorkFlash memory
• 32 Kbytes
• Read cycle:
• 6 wait-cycle: the operation frequency more than 120 MHz,
and up to 160 MHz
• 4 wait-cycle: the operation frequency more than 72 MHz,
and up to 120 MHz
• 2 wait-cycle: the operation frequency more than 40 MHz,
and up to 72 MHz
• 0 wait-cycle: the operation frequency up to 40 MHz
• Security function is shared with code protection
SRAM
This is composed of three independent SRAMs (SRAM0,
SRAM1 and SRAM2). SRAM0 is connected to I-code bus or
D-code bus of Cortex-M4F core. SRAM1 and SRAM2 are
connected to System bus of Cortex-M4F core.
SRAM0: Up to 32 Kbytes
SRAM1: Up to 16 Kbytes
SRAM2: Up to 16 Kbytes
External Bus Interface
Supports SRAM, NOR, NAND Flash and SDRAM device
Up to 9 chip selects CS0 to CS8 (CS8 is only for SDRAM)
8-/16-bit Data width
Up to 25-bit Address bit
Supports Address/Data multiplex
Supports external RDY function
Supports scramble function
• Possible to set the validity/invalidity of the scramble
function for the external areas 0x6000_0000 to
0xDFFF_FFFF in 4 Mbytes units.
• Possible to set two kinds of the scramble key
• Note: It is necessary to prepare the dedicated software
library to use the scramble function.
CAN Interface (Max 2 channels)
Compatible with CAN Specification 2.0A/B
Maximum transfer rate: 1 Mbps
Built-in 32 message buffer
Multi-function Serial Interface (Max 8 channels)
64 bytes with FIFO (the FIFO step numbers are variable
depending on the settings of the communication mode or bit
length.)
Operation mode is selectable from the followings for each
channel.
UART
CSIO
LIN
I2C
UART
Full-duplex double buffer
Selection with or without parity supported
Built-in dedicated baud rate generator
External clock available as a serial clock
Hardware Flow control : Automatically control the
transmission by CTS/RTS (only ch.4)
Cypress Semiconductor Corporation
Document Number: 001-98941 Rev.*A
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised October 8, 2015
S6E2H4 Series
Stop
Deep standby RTC (selectable from with/without RAM
retention)
Deep standby stop (selectable from with/without RAM
retention)
VBAT
The consumption power during the RTC operation can be
reduced by supplying the power supply independent from the
RTC (calendar circuit)/32 kHz oscillation circuit. The following
circuits can also be used.
RTC
32 kHz oscillation circuit
Power-on circuit
Back up register: 32 bytes
Port circuit
Debug
Serial Wire JTAG Debug Port (SWJ-DP)
Embedded Trace Macrocells (ETM) provide comprehensive
debug and trace facilities.
Unique ID
Unique value of the device (41-bit) is set.
Power Supply
Three Power Supplies
Wide range voltage: VCC = 2.7 V to 5.5 V
Power supply for VBAT: VBAT = 2.7 V to 5.5 V
Document Number: 001-98941 Rev.*A
Page 4 of 159
4페이지 S6E2H4 Series
1. Product Lineup
Memory Size
Product name
MainFlash memory
WorkFlash memory
On-chip SRAM
SRAM0
SRAM1
SRAM2
S6E2H44E0A
S6E2H44F0A
S6E2H44G0A
256 Kbytes
32 Kbytes
32 Kbytes
16 Kbytes
8 Kbytes
8 Kbytes
S6E2H46E0A
S6E2H46F0A
S6E2H46G0A
512 Kbytes
32 Kbytes
64 Kbytes
32 Kbytes
16 Kbytes
16 Kbytes
Function
Product name
Pin count
CPU
Freq.
Power supply voltage range
CAN
DMAC
DSTC
External Bus Interface
Multi-function Serial Interface
(UART/CSIO/LIN/I2C)
Base Timer
(PWC/Reload timer/PWM/PPG)
A/D activation
compare
6ch.
Input capture
4ch.
Free-run timer
3ch.
Output compare
6ch.
Waveform generator 3ch.
PPG
3ch.
QPRC
Dual Timer
Real-Time Clock
Watch Counter
CRC Accelerator
Watchdog Timer
External Interrupts
I/O Ports
12-bit A/D Converter
12-bit D/A Converter
CSV (Clock Super Visor)
LVD (Low-Voltage Detector)
Built-in CR
High-speed
Low-speed
Debug Function
Unique ID
S6E2H44E0A
S6E2H46E0A
S6E2H44F0A
S6E2H46F0A
S6E2H44G0A
S6E2H46G0A
80 100 120/121
Cortex-M4F, MPU, NVIC 128ch.
160 MHz
2.7 V to 5.5 V
2ch. (Max)
8ch.
256ch.
Addr:19-bit (Max),
R/W data: 8-bit
(Max),
CS:5 (Max),
SRAM,
NOR Flash
Addr:25-bit (Max),
R/W data: 8-/16-bit
(Max),
CS:9 (Max),
SRAM,
NOR Flash,
SDRAM
Addr:25-bit (Max),
R/W data: 8-/16-bit
(Max),
CS:9 (Max),
SRAM,
NOR Flash,
NAND Flash,
SDRAM
8ch. (Max)
8ch. (Max)
3 units (Max)
63 pins (Max)
16ch. (3 units)
3ch. (Max)
1 unit
1 unit
1 unit
Yes
1ch. (SW) + 1ch. (HW)
16 pins (Max) + NMI × 1
80 pins (Max)
100 pins (Max)
24ch. (3 units)
2 units (Max)
Yes
2ch.
4 MHz (±2%)
100 kHz (Typ)
SWJ-DP/ETM
Yes
Document Number: 001-98941 Rev.*A
Page 7 of 159
7페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
S6E2H44F0A | Microcontroller | Cypress Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |