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S6E2C5AJ0A 데이터시트, 핀배열, 회로
S6E2C5 Series
32-bit ARM® Cortex®-M4F
FM4 Microcontroller
Devices in the S6E2C5 Series are highly integrated 32-bit microcontrollers with high performance and competitive cost. This
series is based on the ARM Cortex-M4F processor with on-chip flash memory and SRAM. The series has peripherals such as
motor control timers, A/D converters, and communications interfaces (USB, CAN, UART, CSIO (SPI), I2C, LIN). The products that
are described in this data sheet are placed into TYPE3-M4 product categories "FM4 Family Peripheral Manual Main Part
(002-04856)."
Features
32-bit ARM Cortex-M4F Core
Processor version: r0p1
Up to 200 MHz frequency operation
FPU built-in
Support DSP instructions
Memory protection unit (MPU): improves the reliability of an
embedded system
Integrated nested vectored interrupt controller (NVIC): 1 NMI
(non-maskable interrupt) and 128 peripheral interrupts and
16 priority levels
24-bit system timer (Sys Tick): system timer for OS task
management
On-chip Memories
Flash memory
This series is based on two independent on-chip flash
memories.
Up to 2048 Kbytes
Built-in flash accelerator system with 16 Kbytes trace buffer
memory
Read access to flash memory that can be achieved without
wait-cycle up to an operating frequency of 72 MHz. Even at
the operating frequency more than 72 MHz, an equivalent
single cycle access to flash memory can be obtained by
the flash accelerator system.
Security function for code protection
SRAM
This is composed of three independent SRAMs (SRAM0,
SRAM1 and SRAM2). SRAM0 is connected to the I-code bus
or D-code bus of Cortex-M4F core. SRAM1 and SRAM2 are
connected to system bus of Cortex-M4F core.
SRAM0: up to 192 Kbytes
SRAM1: 32 Kbytes
SRAM2: 32 Kbytes
External Bus Interface
Supports SRAM, NOR, NAND flash and SDRAM device
Up to 9 chip selects CS0 to CS8 (CS8 is only for SDRAM)
8-/16-/32-bit data width
Up to 25-bit address bus
Supports address/data multiplexing
Supports external RDY function
Supports scramble function
Possible to set the validity/invalidity of the scramble function
for the external areas 0x6000_0000 to 0xDFFF_FFFF in 4
Mbytes units.
Possible to set two kinds of the scramble key
Note: It is necessary to use the Cypress provided software
library to use the scramble function.
USB Interface (Max two Channels)
The USB interface is composed of a function and a host.
USB function
USB 2.0 Full-speed supported
Max 6 EndPoint supported
EndPoint 0 is control transfer
EndPoint 1, 2 can be selected bulk-transfer,
interrupt-transfer or isochronous-transfer
EndPoint 3 to 5 can select bulk-transfer or
interrupt-transfer
EndPoint 1 to 5 comprise double buffer
The size of each endpoint is as follows.
Endpoint 0, 2 to 5: 64 byte
EndPoint 1: 256 byte
USB host
USB2.0 Full-Speed/Low-Speed supported
Bulk-transfer, interrupt-transfer, and isochronous-transfer
support
USB Device connected/dis-connected automatically detect
IN/OUT token handshake packet automatically
Max 256-byte packet length supported
Wake-up function supported
Cypress Semiconductor Corporation
Document Number: 002-04984 Rev.*A
• 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Revised February 8, 2016




S6E2C5AJ0A pdf, 반도체, 판매, 대치품
S6E2C5 Series
Watchdog Timer (2 Channels)
A watchdog timer can generate interrupts or a reset when a
time-out value is reached.
This series consists of two different watchdogs: a "hardware"
watchdog and a "software" watchdog.
The hardware watchdog timer is clocked by low-speed
internal CR oscillator. The hardware watchdog is thus active
in any power saving mode except RTC mode and Stop mode.
Cyclic Redundancy Check (CRC) Accelerator
The CRC accelerator helps to verify data transmission or
storage integrity.
CCITT CRC16 and IEEE-802.3 CRC32 are supported.
CCITT CRC16 generator polynomial: 0x1021
IEEE-802.3 CRC32 generator polynomial: 0x04C11DB7
Programmable Cyclic Redundancy Check
(PRGCRC) Accelerator
The CRC accelerator helps a verify data transmission or
storage integrity.
CCITT CRC16, IEEE-802.3 CRC32 and generating
polynomial are supported.
CCITT CRC16 generator polynomial: 0x1021
IEEE-802.3 CRC32 generator polynomial: 0x04C11DB7
Generating polynomial
SD Card Interface
It is possible to use the SD card that conforms to the
following standards.
Part 1 Physical Layer Specification version 3.01
Part E1 SDIO Specification version 3.00
Part A2 SD Host Controller Standard Specification version
3.00
1-bit or 4-bit data bus
Document Number: 002-04984 Rev.*A
I2S (Inter-IC Sound Bus) Interface (TX x 1 channel,
RX x 1 channel)
Supports three transfer protocols
I2S
Left justified
DSP mode
Separate clock generation block for flexible system
integration options
Master/slave mode selectable
RX Only, TX Only or TX and RX simultaneous operation
selectable
Word length is programmable from 7-bits to 32 bits
RX/TX FIFO integrated (RX: 66 words x 32-bits, TX: 66
words x 32-bits)
DMA, interrupts, or polling based data transfer supported
Clock and Reset
Clocks
Five clock sources (two external oscillators, two internal CR
oscillators, and Main PLL) that are dynamically selectable.
Main clock: 4 MHz to 48 MHz
Sub clock: 32.768 kHz
High-speed internal CR clock: 4 MHz
Low-speed internal CR clock: 100 kHz
Main PLL Clock
Resets
Reset requests from INITX pin
Power on reset
Software reset
Watchdog timer reset
Low-voltage detector reset
Clock supervisor reset
Clock Supervisor (CSV)
Clocks generated by internal CR oscillators are used to
supervise abnormality of the external clocks.
External OSC clock failure (clock stop) is detected, reset is
asserted.
External OSC frequency anomaly is detected, interrupt or
reset is asserted.
Low-Voltage Detector (LVD)
This Series include two-stage monitoring of voltage on the
VCC pins. when the voltage falls below the voltage that has
been set, the low-voltage detector function generates an
interrupt or reset.
LVD1: error reporting via interrupt
LVD2: auto-reset operation
Page 4 of 200

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S6E2C5AJ0A 전자부품, 판매, 대치품
S6E2C5 Series
12.8 Low-Voltage Detection Characteristics ................................................................................................................... 187
12.8.1 Low-Voltage Detection Reset .............................................................................................................................. 187
12.8.2 Interrupt of Low-Voltage Detection ...................................................................................................................... 187
12.9 MainFlash Memory Write/Erase Characteristics..................................................................................................... 188
12.10 Dual Flash Memory Write/Erase Characteristics .................................................................................................... 188
12.11 Standby Recovery Time ......................................................................................................................................... 189
12.11.1 Recovery cause: Interrupt/WKUP ........................................................................................................................ 189
12.11.2 Recovery Cause: Reset ....................................................................................................................................... 191
13. Ordering Information............................................................................................................................................... 193
14. Package Dimensions............................................................................................................................................... 194
15. Major Changes......................................................................................................................................................... 198
Document History............................................................................................................................................................... 199
Sales, Solutions, and Legal Information........................................................................................................................... 200
Document Number: 002-04984 Rev.*A
Page 7 of 200

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