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PDF BU91797MUF-M Data sheet ( Hoja de datos )
| Número de pieza | BU91797MUF-M | |
| Descripción | Low Duty LCD Segment Driver | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
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Datasheet
Low Duty LCD Segment Driver
for Automotive application
BU91797MUF-M MAX 144 Segments (SEG36×COM4)
General Description
BU91797MUF-M is a 1/4 duty general-purpose LCD
driver that can be used for automotive applications and
can drive up to 144 LCD Segments.
It can support operating temperature of up to +105°C and
qualified for AEC-Q100 Grade2, as required for
automotive applications.
Wettable flank QFN package is suitable for small
footprint applications and provides significant
advantages in inspectability and solder joint reliability.
Features
AEC-Q100 Qualified (Note)
Integrated RAM for Display Data (DDRAM):
36 x 4 bit (Max 144 Segment)
LCD Drive Output:
4 Common Output, Max 36 Segment Output
Integrated Buffer AMP for LCD Driving
Integrated Oscillator Circuit
No External Components
Low Power Consumption Design
(Note) Grade 2
Applications
Instrument Clusters
Climate Controls
Car Audios / Radios
Metering
White Goods
Healthcare Products
Battery Operated Applications
etc.
Key Specifications
■ Supply Voltage Range:
+2.5V to +6.0V
■ Operating Temperature Range: -40°C to +105°C
■ Max Segments:
144Segments
■ Display Duty:
1/4
■ Bias:
1/2, 1/3 selectable
■ Interface:
2wire Serial Interface
Special Characteristics
■ ESD(HBM):
■ Latch-up current:
±2000V
±100mA
Package
W (Typ.) x D (Typ.) x H (Max.)
VQFN48FV7070
7.0mm x 7.0mm x 1.0mm
Typical Application Circuit
VDD
C > 0.1uF
Controller
Insert Capacitors
between VDD and VSS
VDD
VLCD
SDA
SCL
OSCIN
TEST 1
TEST 2
VSS
COM0
COM1
COM2
COM3
SEG0
S・・・・・・・EG1
SEG35
Segment
LCD
・・・・・・・
Internal Clock Mode
Figure 1. Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111･14･001
○This product has no designed protection against radioactive rays.
1/23
TSZ02201-0P4P0D301040-1-2
21.Dec.2015 Rev.001
1 page  
BU91797MUF-M MAX 144 segments (SEG36×COM4)
Datasheet
Electrical Characteristics - continued
MPU interface Characteristics (VDD=2.5V to 6.0V, VLCD=0V, VSS=0V, Ta=-40°C to +105°C, unless otherwise specified)
Parameter
Limits
Symbol
Unit
Min Typ Max
Conditions
Input Rise Time
tr - - 0.3 µs
Input Fall Time
tf - - 0.3 µs
SCL Cycle Time
tSCYC
2.5
-
- µs
“H” SCL Pulse Width
tSHW
0.6
-
- µs
“L” SCL Pulse Width
tSLW
1.3
-
- µs
SDA Setup Time
tSDS
100
-
- ns
SDA Hold Time
tSDH
100
-
- ns
Buss Free Time
tBUF
1.3
-
- µs
START Condition Hold Time tHD;STA 0.6
-
- µs
START Condition Setup Time tSU;STA 0.6
-
- µs
STOP Condition Setup Time tSU;STO 0.6
-
- µs
SDA
SCL
SDA
I/O Equivalence Circuit
VDD
VLCD
VSS
SDA
tBUF
tS LW
tf
tSCYC
tHD; STA tr
tSDH tS HW tSDS
tSU; STA
Figure 5. Interface Timing
VDD
VSS
SCL
tSU; STO
VSS
VSS
VDD
TEST1
VSS
VDD
TEST2
VSS
VDD
OSCIN
VSS
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
VDD
SEG/COM
VSS
Figure 6 I/O Equivalence Circuit
5/23
TSZ02201-0P4P0D301040-1-2
21.Dec.2015 Rev.001
5 Page 
BU91797MUF-M MAX 144 segments (SEG36×COM4)
Datasheet
Display Control (DISCTL)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C 0 1 P4 P3 P2 P1 P0
Set Power save mode FR.
Setup
P4 P3
Reset initialize condition
Normal mode (80Hz)
00
○
Power save mode 1 (71Hz)
01
Power save mode 2 (64Hz)
10
Power save mode 3 (50Hz)
11
Power consumption is reduced in the following order:
Normal mode > Power save mode1 > Power save mode 2 > Power save mode 3.
Set LCD drive waveform.
Setup
P2 Reset initialize condition
Line inversion
0
○
Frame inversion
1
Power consumption is reduced in the following order:
Line inversion > Frame inversion
Typically, when driving large capacitance LCD, Line inversion will increase the influence of crosstalk.
Regarding driving waveform, refer to LCD driving waveform.
Set Power save mode SR.
Setup
P1
P0
Reset initialize condition
Power save mode 1
00
Power save mode 2
01
Normal mode
10
○
High power mode
11
Power consumption is increased in the following order:
Power save mode 1 < Power save mode 2 < Normal mode < High power mode
Use VDD- VLCD ≥ 3.0V in High power mode condition.
(Reference current consumption data)
Setup
Current consumption
Power save mode 1
×0.5
Power save mode 2
×0.67
Normal mode
×1.0
High power mode
×1.8
The data above is for reference only. Actual consumption depends on Panel load.
Address Set (ADSET)
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
C 0 0 P4 P3 P2 P1 P0
The range of address can be set from 000000 to 100011(bin).
Internal register
Command
MSB
Address
[5]
ICSET
P2
Address
[4]
ADSET
P4
Address
[3]
ADSET
P3
Address
[2]
ADSET
P2
Address
[1]
ADSET
P1
LSB
Address
[0]
ADSET
P0
Address [5:0]: MSB bit is specified in ICSET P2 and [4:0] are specified as ADSET P4 - P0.
Don’t set out of range address, otherwise address will be set to 00000.
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
11/23
TSZ02201-0P4P0D301040-1-2
21.Dec.2015 Rev.001
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet BU91797MUF-M.PDF ] | |
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