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PDF BU91R63CH-M3BW Data sheet ( Hoja de datos )
| Número de pieza | BU91R63CH-M3BW | |
| Descripción | Low Duty LCD Segment Driver | |
| Fabricantes | ROHM Semiconductor | |
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Datasheet
Low Duty LCD Segment Driver
For Automotive COG Application
BU91R63CH-M3BW Max 176 segments (SEG44 x COM4)
General Description
BU91R63CH-M3BW is a 1/4, 1/3, 1/2 duty or Static COG
type LCD driver that can be used for automotive
applications and can drive up to 176 LCD segments.
It can support operating temperature of up to +105°C and
compliant for AEC-Q100, as required for Automotive
Application. It has integrated display RAM for reducing
CPU load. Also, it is designed with low power consumption
and no external component needed. It includes read
function for display RAM and command register, wherein it
is possible to detect malfunction due to noise. Also a
defective mounting of COG can easily be controlled by
using pins to measure ITO resistance.
Features
AEC-Q100 compliant (Note1)
1/4, 1/3, 1/2 duty or Static setting selectable
1/4 duty drive: Max 176 segments
1/3 duty drive: Max 132 segments
1/2 duty drive: Max 88 segments
Static drive: Max 44 segments
Integrated Buffer AMP for LCD driving
Support Read Register and Display RAM Function
Support ITO Resistance Measurement
Integrated Oscillator Circuit
Integrated EVR function to adjust LCD contrast
Integrated Power-on Reset Circuit
No External Components
Low Power Consumption Design
(Note1) Quality Information:
There is data when LSI was put on a temporary package.
Please use it as reference data.
Typical Application Circuit
[ LCD module ]
Key Specifications
Supply Voltage Range:
+2.7V to +6.0V
LCD Drive Power Supply Range:
+2.7V to +6.0V
Operating Temperature Range:
-40°C to +105°C
Max Segments:
176 Segments
Display Duty:
1/4, 1/3, 1/2, Static selectable
Bias:
1/2, 1/3 selectable
Interface:
2 wire serial interface
Special Characteristics
ESD(HBM):
Latch-up current:
±2000V
±100mA
Applications
Instrument Clusters
Climate Controls
Car Audios / Radios
Metering
White Goods
Healthcare Products
Battery Operated Applications
etc.
Package
Au BUMP chip
44 x 4 dots
(Top view)
30
COM
43
SEG
0
BU91R63CH-M3BW (Bottom view)
VLCD VSS VDD
SCL SDA
VLCD VSS VDD
SCL SDA
MCU
(Note) SDA of BU91R63CH-M3BW needs pull-up
resistor due to open-drain output.
In case that SCL of MCU has open-drain structure,
it also needs pull-up resistor.
Figure 1. Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit
.www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product has no designed protection against radioactive rays
1/33
TSZ02201-0P4P0D301380-1-2
10 Feb. 2016 Rev.001
1 page  
BU91R63CH-M3BW Max 176 segments (SEG44 x COM4)
PAD Coordinates
No Terminal Name
1 Dummy1
2 Dummy1
3 SDA
4 SDA
5 SCL
6 SCL
7 OSCIN
8 OSCIN
9 VSS
10 VSS
11 T0
12 T0
13 T1
14 T1
15 T2
16 T2
17 VDD
18 VDD
19 VDD
20 VDD
21 VSS
22 VSS
23 VSS
24 VSS
25 VSS
26 VSS
27 VSS
28 VLCD
29 VLCD
30 VLCD
31 VLCD
32 Dummy2
33 Dummy2
34 Dummy
35 COM3
36 COM2
37 COM1
38 COM0
39 SEG43
40 SEG42
41 SEG41
42 SEG40
43 SEG39
44 SEG38
45 SEG37
46 SEG36
47 SEG35
48 SEG34
49 SEG33
50 SEG32
51 SEG31
52 SEG30
53 SEG29
54 SEG28
55 SEG27
56 SEG26
57 SEG25
58 SEG24
59 SEG23
60 SEG22
61 SEG21
62 SEG20
63 SEG19
64 SEG18
65 SEG17
66 SEG16
67 SEG15
68 SEG14
69 SEG13
70 SEG12
71 SEG11
72 SEG10
73 SEG9
74 SEG8
75 SEG7
76 SEG6
77 SEG5
78 SEG4
79 SEG3
80 SEG2
81 SEG1
82 SEG0
83 Dummy
X
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
-248.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
227.00
BUMP Center
Y
1340.00
1270.00
1045.00
975.00
905.00
835.00
765.00
695.00
625.00
555.00
485.00
415.00
345.00
275.00
205.00
135.00
65.00
-5.00
-75.00
-145.00
-215.00
-285.00
-355.00
-425.00
-495.00
-565.00
-635.00
-705.00
-775.00
-845.00
-915.00
-1005.00
-1636.00
-1496.55
-1442.55
-1388.55
-1334.55
-1280.55
-1226.55
-1172.55
-1118.55
-1064.55
-950.90
-896.90
-842.90
-788.90
-734.90
-680.90
-626.90
-572.90
-458.85
-404.85
-350.85
-296.85
-242.85
-188.85
-134.85
-80.85
33.20
87.20
141.20
195.20
249.20
303.20
357.20
411.20
525.25
579.25
633.25
687.25
741.25
795.25
849.25
903.25
1017.30
1071.30
1125.30
1179.30
1233.30
1287.30
1341.30
1395.30
1449.30
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/33
BUMP Size
XY
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
60 55
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
75 39
TSZ02201-0P4P0D301380-1-2
10 Feb. 2016 Rev.001
5 Page 
BU91R63CH-M3BW Max 176 segments (SEG44 x COM4)
Read Display and Transfer Method
For Read Mode set R/W bit to ‘1’.
The display data and command register value can be read during Read Mode.
The Read Mode sequence is shown below.
Slave address
Command
Command
Slave address
S 0111110 0 A 1 1101000 A 1 0000000 A S 0111110 1 A
Data A …...
R/W(Write Mode)
R/W(Read Mode)
Data A P
During Read Mode, the display data can be read from the DDRAM through the SDA line.
The data will output synchronously to SCL clock input.
First set address by Write Mode ADSET command to read display data.
If DDRAM address is not specified before DDRAM read, the read address will start from the current DDRAM
address.
Address will increment automatically by +2 addresses after 8bit data output.
Master side should output ACK signal after each 8bit data output.
BU91R63CH-M3BW is kept at Read Mode and address increment after receiving ACK signal from master side.
If there is no ACK response, BU91R63CH-M3BW will not keep above read operation, transmit “STOP
condition”.
Read Mode will be stopped by sending “STOP condition”.
Address will be set to 00h automatically after 2Bh. (It does not increment to 2Ch or 2Dh address)
Shown below is an example of the display data read sequence.
S
SDA
SCL
Slave Address (read)
P
A D7 D6 D5 D4 D3 D2 D1 D0 A D7 D6 D5 D4 D3 D2 D1 D0 A
Figure 9. Read Sequence
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/33
TSZ02201-0P4P0D301380-1-2
10 Feb. 2016 Rev.001
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BU91R63CH-M3BW.PDF ] | |
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