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PDF BU97530KVT Data sheet ( Hoja de datos )
| Número de pieza | BU97530KVT | |
| Descripción | Multi-function LCD Segment Drivers | |
| Fabricantes | ROHM Semiconductor | |
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LCD Segment Drivers
Multi-function LCD Segment Drivers
BU97530KVT
MAX 445 Segment(89segx5COM)
General Description
The BU97530KVT is 1/5, 1/4, 1/3 or 1/1 duty
general-purpose LCD driver that can be used for
frequency display in electronic tuners under the
control of a microcontroller. The BU97530KVT can
drive up to 445 LCD Segments directly. The
BU97530KVT can also control up to 9
general-purpose output ports.
These products also incorporate a key scan circuit
that accepts input from up to 30 keys to reduce
printed circuit board wring.
Features
Key input function for up to 30 keys (A key scan is
performed only when a key is pressed.)
Either 1/5, 1/4, 1/3 or 1/1 duty (static) can be
selected with the serial control data.
1/5 duty drive: Up to 445 segments can be driven
1/4 duty drive: Up to 360 segments can be driven
1/3 duty drive: Up to 270 segments can be driven
1/1 duty drive: Up to 90 segments can be driven
Serial data control of frame frequency for common
and segment output waveforms.
Serial data control of switching between the
segment output port , PWM output port and
general-purpose output port functions.(Max 9
ports)
Built-in OSC circuit
Integrated Power-on Reset circuit
No external component
Low power consumption design
Supports Line and Frame Inversion
Key Specifications
Supply Voltage Range:
+2.7V to +6.0V
Operating Temperature Range:
-40°C to +85°C
Max Segments:
445 Segments
Display Duty:
1/1,1/3,1/4,1/5 selectable
Bias:
1/2, 1/3 selectable
Interface:
3wire serial interface
Packages
TQFP100V
W(Typ.)×D(Typ.)×H(Max.)
TQFP100V
16.00mm x 16.00mm x 1.20mm
Applications
Car audio, Home electrical appliance,
Meter equipment etc.
Typical Application Circuit
Key Matrix
+5V
(Note1)
From
Control
To Control
KS1/S79
|
KS6/S84
VDD
KI1/S85
| COM1
KI5/S89 COM2
COM3
COM4
COM5/S78
S1/P1/G1
SCE
SCL
SDI
SDO
S9/P9/G9
S10
S77
OSC/S90
(P1/G1) (General purpose/PWM ports)
(P9/G9) (For use control of backlight)
LCD Panel
(Up to 445
Segments)
(Note1) Insert capacitors between VDD and VSS C≥0.1uF
Figure 1. Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit
.www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product is not designed protection against radioactive rays
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1 page  
BU97530KVT
Datasheet
MPU Interface Characteristics (Ta = -40 to +85°C, VDD = 2.7V to 6.0V, VSS = 0.0V)
Parameter
Symbol
Pin
Conditions
Limit
Min Typ
Data Setup Time
tds SCL, SDI
120 -
Data Hold Time
tdh SCL, SDI
120 -
SCE Wait Time
tcp SCE, SCL
120 -
SCE Setup Time
tcs SCE, SCL
120 -
SCE Hold Time
tch SCE, SCL
120 -
Clock Cycle Time
tccyc SCL
320 -
High-level Clock Pulse
Width
tchw SCL
120 -
Low-level Clock Pulse
Width (Write)
tclww SCL
120 -
Low-Level Clock Pulse
Width (Read)
tclwr SCL
RPU=4.7KΩ
CL=10pF(Note4)
1.6 -
Rise Time
tr SCE, SCL, SDI
- 160
Fall Time
tf SCE, SCL, SDI
- 160
SDO Output Delay
Time
tdc SDO
RPU=4.7KΩ
CL=10pf(Note4)
--
SDO Rise Time
tdr SDO
RPU=4.7KΩ
CL=10pf(Note4)
--
(Note4) Since SDO is an open-drain output, “tdc” and “tdr” depend on the resistance of the pull-up resistor RPU and the load capacitance CL.
RPU: 1kΩ≤RPU≤10kΩ is recommended.
CL: A parasitic capacitance to VSS in an application circuit. Any component is not necessary to be attached.
Power supply for I/O level
SDO
RPU Host
CL
Max
-
-
-
-
-
-
-
-
-
-
-
1.5
1.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
us
ns
ns
µs
µs
1. When SCL is stopped at the low level
SCE
SCL
SDI
SDO
VIH1, VIH2
VIL1
tccyc
tchw
tclww
tr
VIH1, VIH2
VIL1
tf
tds tdh
2. When SCL is stopped at the high level
SCE
VIH1,VIH2
SCL
VIL1
tccyc
tclww
tchw
SDI
tf
VIH1,VIH2
VIL1
tr
SDO
tds tdh
VIH1, VIH2
tcs
tclwr
VIL1
tch
VIH1, VIH2
tclwr
tcp
VOL5
tdc
tdr
VIL1
tch
VOL5
tdc
Figure 5.Serial Interface Timing
tdr
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
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BU97530KVT
(2)When SCL is stopped at the high level
Datasheet
SCE
SCL
SDI 1 0 1 0 0 0 1 0 D1 D2
B0 B1 B2 B3 A0 A1 A2 A3
Device Code
8bits
D104 D105 D106 D107 D108 D109 D110 D111 D112 D113 D114 D115 D116 D117 D118 D119 D120 0
Display Data
120bits
0 KM0 KM1 KM2 P0 P1 P2 P3 FL DR DT0 DT1 FC0 FC1 FC2 OC SC BU0 BU1 BU2 0 0
Control Data
30bits
DD
2 bits
1 0 10 001 0
B0 B1 B2 B3 A0 A1 A2 A3
Device Code
8bits
D121 D122
D224 D225 D226 D227 D228 D229 D230 D231 D232 D233 D234 D235 D236 D237 D238 D239 D240 0 0
Display Data
120bits
0 0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PF0 PF1 PF2 PF3 CT0 CT1 CT2 CT3 0 1
Control Data
30bits
DD
2 bits
1 0 10 001 0
B0 B1 B2 B3 A0 A1 A2 A3
Device Code
8bits
D241 D242
D330 D331 D332 D333 D334 D335 D336 D337 D338 D339 D340 0 0
Display Data
100bits
0 0 W11
W16 W17 W18 0 W21
W26 W27 W28 0 W31
Control Data
50bits
W36 W37 W38 0 W41
W46 W47 W48 1 0
DD
2 bits
1 0 10 001 0
B0 B1 B2 B3 A0 A1 A2 A3
Device Code
8bits
D341 D342
D360 0
Display Data
20bits
0
0 0 0 0 0 0 W51
W56 W57 W58 0 W61
W66 W67 W68 0 W71
Control Data
130bits
W76 W77 W78 0 W81
W86 W87 W88 0 W91
W96 W97 W98 1 1
DD (Note8)
2 bits
(Note8) DD is direction data.
Figure 10. 3-SPI Data Transfer Format
・Device code････････････････････”45H”
・KM0～KM2･････････････････････Key Scan output port/Segment output port switching control data
・D1～D445･･････････････････････Display data
・P0～P3････････････････････････Segment / PWM / General Purpose output port switching control data
・FL･････････････････････････････Line Inversion or Frame Inversion switching control data
・DR････････････････････････････1/3 bias drive or 1/2 bias drive switching control data
・DT0~DT1･･････････････････････1/5 duty drive, 1/4 duty drive, 1/3 duty drive or 1/1 duty(static) drive switching control data
・FC0～FC3･････････････････････Common/Segment output waveform frame frequency switching control data
・OC･･･････････････････････････ Internal oscillator operating mode/External clock operating mode switching control data
・SC････････････････････････････Segment on/off switching control data
・BU0～BU2･････････････････････Normal mode/power-saving mode switching control data
・PG1～PG9････････････････････ PWM/General Purpose output switching control data
・PF0～PF3･････････････････････PWM output waveform frame frequency switching control data
・CT0～CT3･････････････････････LCD display contrast switching control data
・W11～W18, W21～W28, W31～W38,W41～W48, W51～W58, W61～W68, W71~W78, W81~W88, W91~W98
･･････････････････････････････････PWM output duty switching control data
www.rohm.com
© 2014 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/56
TSZ02201-0P4P0D300570-1-2
02.Mar.2015 Rev.003
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BU97530KVT.PDF ] | |
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