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부품번호 | 74LVC16245A-Q100 기능 |
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기능 | 16-bit bus transceiver | ||
제조업체 | NXP Semiconductors | ||
로고 | |||
전체 17 페이지수
74LVC16245A-Q100;
74LVCH16245A-Q100
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state
Rev. 1 — 20 November 2012
Product data sheet
1. General description
The 74LVC16245A-Q100; 74LVCH16245A-Q100 are 16-bit transceivers featuring
non-inverting 3-state bus compatible outputs in both send and receive directions. The
device features two output-enable (nOE) inputs for easy cascading and two send/receive
(nDIR) inputs for direction control. nOE controls the outputs so that the buses are
effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit
transceiver. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to
5.5 V can be applied to the outputs. These features allow the use of these devices in
mixed 3.3 V and 5 V applications.
The 74LVCH16245A-Q100 bus hold on data inputs eliminates the need for external
pull-up resistors to hold unused inputs.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
MULTIBYTE flow-through standard pinout architecture
Low inductance multiple power and ground pins for minimum noise and ground
bounce
Direct interface with TTL levels
High-impedance when VCC = 0 V
All data inputs have bus hold (74LVCH16245A-Q100 only)
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
NXP Semiconductors 74LVC16245A-Q100; 74LVCH16245A-Q100
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state
5. Pinning information
5.1 Pinning
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Fig 4. Pin configuration SOT362-1 (TSSOP48)
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DDD
7UDQVSDUHQW WRS YLHZ
Fig 5. Pin configuration SOT702-1 (VFBGA56)
74LVC_LVCH16245A_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 November 2012
© NXP B.V. 2012. All rights reserved.
4 of 17
4페이지 NXP Semiconductors 74LVC16245A-Q100; 74LVCH16245A-Q100
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min Typ[1] Max Min Max
VIH HIGH-level input VCC = 1.2 V
voltage
VCC = 1.65 V to 1.95 V
1.08
0.65 VCC
-
-
- 1.08 - V
- 0.65 VCC - V
VCC = 2.3 V to 2.7 V
1.7 -
-
1.7
-V
VCC = 2.7 V to 3.6 V
2.0 -
-
2.0
-V
VIL LOW-level input VCC = 1.2 V
voltage
VCC = 1.65 V to 1.95 V
- - 0.12 - 0.12 V
- - 0.35 VCC - 0.35 VCC V
VCC = 2.3 V to 2.7 V
- - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V
- - 0.8 - 0.8 V
VOH HIGH-level
VI = VIH or VIL
output voltage
IO = 100 A;
VCC = 1.65 V to 3.6 V
VCC 0.2 -
- VCC 0.3 - V
IO = 4 mA; VCC = 1.65 V 1.2 -
-
1.05
-V
IO = 8 mA; VCC = 2.3 V
1.8 -
-
1.65
-V
IO = 12 mA; VCC = 2.7 V 2.2 -
-
2.05
-V
IO = 18 mA; VCC = 3.0 V 2.4 -
-
2.25
-V
IO = 24 mA; VCC = 3.0 V 2.2 -
-
2.0
-V
VOL LOW-level output VI = VIH or VIL
voltage
IO = 100 A;
VCC = 1.65 V to 3.6 V
- - 0.2 - 0.3 V
IO = 4 mA; VCC = 1.65 V
- - 0.45 - 0.65 V
IO = 8 mA; VCC = 2.3 V
- - 0.6 - 0.8 V
IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V
IO = 24 mA; VCC = 3.0 V
- - 0.55
-
0.8 V
II input leakage VI = 5.5 V or GND;
current[2]
VCC = 3.6 V
- 0.1 5
- 20 A
IOZ OFF-state output VI = VIH or VIL;
current[2][3]
VO = 5.5 V or GND;
VCC = 3.6 V
- 0.1 5
- 20 A
IOFF power-off
VI or VO = 5.5 V; VCC = 0.0 V
- 0.1 10
-
20 A
leakage current
ICC
ICC
CI
CI/O
supply current
VI = VCC or GND; IO = 0 A;
VCC = 3.6 V
additional supply per input pin; VI = VCC 0.6 V;
current
IO = 0 A; VCC = 2.7 V to 3.6 V
input capacitance VCC = 0 V to 3.6 V;
VI = GND to VCC
input/output
capacitance
VCC = 0 V to 3.6 V;
VI = GND to VCC
-
-
-
-
0.1 20
5 500
5.0 -
10 -
- 80 A
- 5000 A
- - pF
- - pF
74LVC_LVCH16245A_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 November 2012
© NXP B.V. 2012. All rights reserved.
7 of 17
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부품번호 | 상세설명 및 기능 | 제조사 |
74LVC16245A-Q100 | 16-bit bus transceiver | NXP Semiconductors |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |