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PDF 9DMU0431 Data sheet ( Hoja de datos )
| Número de pieza | 9DMU0431 | |
| Descripción | 2:4 1.5V PCIe Gen1-2-3 Clock Mux | |
| Fabricantes | IDT | |
| Logotipo |  |
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2:4 1.5V PCIe Gen1-2-3 Clock Mux
9DMU0431
DATASHEET
General Description
The 9DMU0431 is a member of IDT's SOC-Friendly 1.5V
Ultra-Low-Power (ULP) PCIe Gen1-2-3 family. Each of the 4
outputs has its own dedicated OE# pin for optimal system
control and power management. The part provides
asynchronous and glitch-free switching modes.
Recommended Application
2:4 PCIe Gen1-2-3 clock multiplexer
Output Features
• 4 – Low-Power (LP) HCSL DIF pair
Key Specifications
• DIF additive cycle-to-cycle jitter <5ps
• DIF phase jitter is PCIe Gen1-2-3 compliant
• Additive phase jitter @ 125MHz: 535fs rms typical (12kHz
to 20MHz)
• DIF output-to-output skew <50ps
Features/Benefits
• LP-HCSL outputs; save 8 resistors compared to standard
HCSL outputs
• 1.5V operation; 31mW typical power consumption
• Selectable asynchronous or glitch-free switching; allows
the mux to be selected at power up even if both inputs are
not running, then transition to glitch-free switching mode
• Spread Spectrum Compatible; supports EMI reduction
• OE# pins; support DIF power management
• HCSL differential inputs; can be driven by common clock
sources
• 1MHz to 167MHz operating frequency
• Space saving 24-pin 4x4mm VFQFPN; minimal board
space
Block Diagram
^OE(3:0)#
DIF_INA
DIF_INB
vSW_MODE
^SEL_A_B#
4
,
A
B
DIF3
DIF2
DIF1
DIF0
9DMU0431 REVISION A 09/24/14
1
©2014 Integrated Device Technology, Inc.
1 page  
9DMU0431 DATASHEET
Electrical Characteristics–Absolute Maximum Ratings
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage
VDDx
Input Voltage
VIN
Input High Voltage, SMBus VIHSMB
Storage Temperature
Ts
SMBus clock and data pins
Junction Temperature
Tj
Input ESD protection
ESD prot
Human Body Model
1Guaranteed by design and characterization, not 100% tested in production.
2 Operation under these conditions is neither implied nor guaranteed.
3 Not to exceed 2.0V.
MIN
-0.5
-0.5
-65
2000
TYP
MAX
2
VDD+0.5
3.3
150
125
UNITS NOTES
V 1,2
V 1,3
V1
°C 1
°C 1
V1
Electrical Characteristics–Input/Supply/Common Parameters–Normal Operating
Conditions
TA = TAMB, Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS NOTES
Supply Voltage
VDDx
Supply voltage for core and analog
Ambient Operating
Temperature
TAMB
Industrial range
Input High Voltage
VIH
Single-ended inputs, except SMBus
Input Low Voltage
VIL
Single-ended inputs, except SMBus
Input Current
IIN Single-ended inputs, VIN = GND, VIN = VDD
Single-ended inputs
IINP VIN = 0 V; Inputs with internal pull-up resistors
VIN = VDD; Inputs with internal pull-down resistors
Input Frequency
Fin
Pin Inductance
Lpin
Capacitance
CIN
CINDIF_IN
Logic Inputs, except DIF_IN
DIF_IN differential clock inputs
COUT
Output pin capacitance
Clk Stabilization
TSTAB
From VDD Power-Up and after input clock
stabilization or de-assertion of PD# to 1st clock
Input SS Modulation
Frequency PCIe
fMODINPCIe
Allowable Frequency for PCIe Applications
(Triangular Modulation)
Input SS Modulation
Frequency non-PCIe
fMODIN
Allowable Frequency for non-PCIe Applications
(Triangular Modulation)
OE# Latency
tLATOE#
DIF start after OE# assertion
DIF stop after OE# deassertion
Tfall tF Fall time of single-ended control inputs
Trise
tR Rise time of single-ended control inputs
1Guaranteed by design and characterization, not 100% tested in production.
2Control input must be monotonic from 20% to 80% of input swing.
3Time from deassertion until outputs are >200 mV
4 DIF_IN input
1.425
-40
0.75 VDD
-0.3
-5
-200
1
1.5
1.5
30
0
1
1.5 1.575 V
25 85 °C
VDD + 0.3
0.25 VDD
5
V
V
uA
1
200 uA
167 MHz 2
7 nH 1
5 pF 1
2.7 pF 1,4
6 pF 1
1 ms 1,2
33 kHz
66 kHz
3 clocks 1,3
5 ns 2
5 ns 2
REVISION A 09/24/14
5 2:4 1.5V PCIE GEN1-2-3 CLOCK MUX
5 Page 
Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, CA 95138 USA
Sales
1-800-345-7015 or 408-284-8200
Fax: 408-284-2775
www.IDT.com
Tech Support
email: [email protected]
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in
this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined
in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether
express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This
document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties.
IDT’s products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably
expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Product specification subject to change without notice. Other trademarks and service marks used herein, including protected
names, logos and designs, are the property of IDT or their respective third party owners.
Copyright ©2014 Integrated Device Technology, Inc.. All rights reserved.
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