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AT91C140 데이터시트 PDF




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AT91C140 데이터시트, 핀배열, 회로
Features
ARM7TDMI® ARM® Thumb® Processor Core
– In-Circuit Emulator, 36 MHz Operation
Ethernet Bridge
– Dual Ethernet 10/100 Mbps MAC Interface
– 16-Kbyte Frame Buffer
1 K-Byte Boot ROM, Embedding a Boot Program
– Enable Application Download from DataFlash®
External Bus Interface
– On-chip 16-bit SDRAM Controller
– 4-Chip Select Static Memory Controller
Multi-level Priority, Individually Maskable, Vectored Interrupt Controller
Three 16-bit Timer/Counters
Two UARTs with Modem Control Lines
Serial Peripheral Interface (SPI)
Two PIO Controllers, Managing up to 48 General-purpose I/O Pins
Available in a 208-lead PQFP Package
Power Supplies
– VDDIO 3.3V nominal
– VDDCORE and VDDOSC 1.8V nominal
-40°C to + 85°C Operating Temperature Range
AT91 ARM®
Thumb®
Microcontrollers
AT91C140
1. Description
The AT91C140 is a member of the Atmel AT91 16- and 32-bit microcontroller family
based on the ARM7TDMI processor core. This processor has a high performance
32-bit RISC architecture with a high density 16-bit instruction set and very low power
consumption.
In addition, the AT91C140 integrates a double Ethernet 10/100 base-T MAC capable
of operating as an Ethernet bridge, thus making it ideally suited for networking appli-
cations. It supports a wide range of memory devices such as SDRAM, SRAM and
Flash and embeds an extensive array of peripherals.
The device is manufactured using Atmel’s high-density CMOS technology. By com-
bining the ARM7TDMI processor core with an expansive assortment of peripheral
functions and low-power oscillators and PLL on a monolithic chip, the Atmel
AT91C140 is a powerful microcontroller that provides a highly flexible and cost effec-
tive solution to many networking applications.
6069C–ATARM–15-Sep-05




AT91C140 pdf, 반도체, 판매, 대치품
Table 3-1. Pinout for 208-lead PQFP Package (Continued)
Pin
Number Signal Name
Pin
Number Signal Name
145 SPCK
161 TMS
146 PA22
162 TCK
147 VDDIO
163 PA19
148 GND
164 VDDCORE
149 NRST
165 GND
150 FIQ
166 PA12
151 IRQ0
167 GND
152 TST
168 VDDIO
153 GND
169 PA11
154 VDDCORE
155 NC(1)
170 PA10
171 PA9
156 VDDIO
172 PA8
157 GND
173 PA7
158 VDDIO
174 PA6
159
160
Note:
TDO
175 VDDIO
TDI 176 NC(1)
1. NC leads should be left unconnected.
Pin
Number
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
Signal Name
PA5
PA4
PA3
PA2
PA1
PA0
GND
RXDA
TXDA
NRSTA
NCTSA
NDTRA
NDSRA
NDCDA
RXDB
TXDB
Pin
Number
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
Signal Name
GND
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
VDDIO
GND
GND
GND
VDDIO
3.1 Mechanical Overview of the 208-lead PQFP Package
Figure 3-1 below shows the orientation of the 208-lead PQFP package.
For a detailed mechanical description, see ”Mechanical Characteristics and Packaging” on
page 165.
Figure 3-1.
208-lead PQFP Package Orientation (Top View)
156 105
157 104
208
1
53
52
4 AT91C140
6069C–ATARM–15-Sep-05

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AT91C140 전자부품, 판매, 대치품
5. Signal Description
Table 5-1. Signal Description
Block
Signal Name
VDDIO
Power Supplies
VDDCORE
VDDOSC
GND
External Bus Interface
A0-A23
D0-D15
SDCK
DQM0-DQM1
SDCS
Synchronous Dynamic
Memory Controller
SDA10
RAS
CAS
WE
BA0-BA1
NCE0-NCE3
Static Memory Controller
NWE0-NWE1
NSOE
NWR
PIO Controller A
PA0-PA12, PA19, PA22
PIO Controller B
PB0-PB9
TCLK0-TCLK2
Timer Counter
TIOA0-TIOA2
TIOB0-TIOA2
MISO
MOSI
Serial Peripheral Interface SPCK
NPCS0/NSS
NPCS1-NPCS3
Function
I/O Lines Power Supply
Device Core Power Supply
PLL and Oscillator Power Supply
Ground
Address Bus
Data Bus
SDRAM Clock
SDRAM Byte Masks
SDRAM Chip Select
SDRAM Address Line 10
Row Address Strobes
Column Address Strobes
Write Enable
Bank Address Line
Chip Selects
Byte Select/Write Enable
Output Enable
Memory Block Write Enable
PIO Controller A I/O Lines
PIO Controller B I/O Lines
Timer Counter Clock 0 to 2
Timer Counter I/O Line A 0 to 2
Timer Counter I/O Line B 0 to 2
Master In/Slave Out
Master Out/Slave In
Serial Clock
Peripheral Chip Select 0/Slave Select
Peripheral Chip Select 1 to 3
AT91C140
Type
Output
Input/Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input/Output
Input/Output
Input
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Output
6069C–ATARM–15-Sep-05
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