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PDF AT88SC118 Data sheet ( Hoja de datos )
| Número de pieza | AT88SC118 | |
| Descripción | CryptoCompanion Chip | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Atmel AT88SC118
CryptoCompanion Chip for
CryptoRF and CryptoMemory Products
Features
DATASHEET
Atmel® CryptoCompanion™ Chip to Atmel CryptoRF® and Atmel CryptoMemory®
Securely implements Host algorithms
Securely stores Host secrets
Verifies Host firmware digests
High security features in hardware
CryptoMemory and CryptoRF F2 Algorithm
SHA-1 standard cryptographic algorithm
64-bit Mutual Authentication Protocol (Under License of ELVA)
Permanently coded serial numbers
High quality Random Number Generator (RNG)
Metal shield over memory
Data scrambling in nonvolatile memory
Delay penalties to prevent systematic attacks
Reset locking to prevent illegal power cycling
Voltage and frequency monitors
Host-side crypto functions
Authentication challenge generation
Device challenge response
Message Authentication Codes (MAC) generation
Data encryption and decryption
Secure authentication key management
Secure storage and key management
Up to 16 sets of 64-bits diversified Host keys
Eight sets of two 24-bit passwords
Secure and custom personalization
Up to 232-byte Read/Write configurable user data area
Nonvolatile up counters
Four sets unidirectional counters
6.4 million maximum counts per counter
Application features
Low voltage supply: 2.7V – 3.6V
2-Wire Serial Interface (TWI, 5V compatible)
Standard 8-lead SOIC plastic package, green compliant (exceeds RoHS)
High reliability
Endurance: 100,000 cycles
Data retention: 10 years
ESD protection: 3,000V min. HBM
Atmel-8857A-CryptoComp-AT88SC118-Datasheet_052013
1 page  
1.4.5
TWI Input/Output Operation
The AT88SC118 communicates to the system using a 2-Wire Interface (TWI), which is similar to SMBus™. The chip
operates as a slave and does not support clock stretching. This 2-Wire protocol is identical to that supported by the Atmel
AT24C16B Serial EEPROM chips. Refer to the datasheet on the Atmel website for detailed timing and protocol
information.
The system processor is expected to properly format commands for the AT88SC118 (which may include information
from the CRF chip), and then process the outputs of the AT88SC118 (which may include sending some of the outputs to
the CRF chip).
The AT88SC118 cannot directly communicate with CRF or CM chips. Both CRF/CM and the
AT88SC118 are slave devices. The bus master may use one or two busses to communicate with them. Separate TWI
addresses must be used if both chips are on the same bus.
Table 1-3. AT88SC118 Communications Packets Naming Conventions.
AT88SC118 Name
Device Address
Cmd
Size
Data
TWI Name
Device Name
Word Address
DataN
DataN+1, …
Description
This byte selects a particular chip on the 2-Wire bus.
Bit 1 of this byte on the AT88SC118 selects between accesses to:
If 1 = Command/Data or
If 0 = The Status Register.
Bit 0 of this byte is the standard 2-wire R/W pin.
If 1 = The bytes following the device address travel from the slave to the
master (Read).
If 0 = These bytes flow to the slave (Write).
If the device address specified a command input (TWI Write), then this byte
specifies the command to be executed by the AT88SC118. This byte doesn’t
exist on Read operations.
The total number of bytes to follow this byte may be zero in the case that there
are no operand bytes. This byte doesn’t exist on status read operations.
Operand input or output bytes as specified in the command descriptions in
Section 3., “Command Descriptions”
If the upper six bits of the device address byte sent over the TWI match the upper six bits of the Dev field in the
EEPROM, then the AT88SC118 may respond to this transmission; otherwise, it will NACK this byte. Dev is set to a value
of 0xC0 on shipment from Atmel.
In general, the AT88SC118 will fail to ACK (NACK) the device address byte if bit 1 of the device address is zero
(command/data transfer) and the AT88SC118 is busy.
The AT88SC118 is designed in such a way that the TWI Size field should be consistent with the count values specified in
the command parameter descriptions from Section 3., “Command Descriptions”. If the TWI Size field is inconsistent with
the command parameter count value, the AT88SC118 will respond in different ways depending on the specific
command. Some of these responses may include security penalties, other error indications, or some input bytes may be
silently ignored.
Atmel AT88SC118 [DATASHEET]
Atmel-8857A-CryptoComp-AT88SC118-Datasheet_052013
5
5 Page 
1.5.6
RNGSeed
This location within the EEPROM is initialized during Atmel manufacturing with a 16 byte random number obtained from
an external high quality hardware random number generator. It is used as part of the input to the random number
generation capability within the AT88SC118. It may be read and/or written when the part is unlocked.
Caution: Atmel does not recommend that it be written to a fixed value.
1.5.7
Read-Only Memory
When the part is locked, the memory in this area can be read but never written except as described in the next
paragraph. After the system has properly responded to the startup challenge, there are no restrictions on the reading of
this memory. This memory section starts at address 0x110 and extends to 0x100 | RW-Bound – 1.
RW-Bound must be at least 0x10 and less than 0xF8 or F-Bound, whichever is smaller.
1.5.8
Read/Write Memory
The memory in this area has general Read/Write permissions, similar to a standard Serial EEPROM. After the system
has properly responded to the startup challenge, there are no restrictions on the access to this memory.
The first byte in this section is at address 0x100 | RW-Bound. If RW-Bound is less than 0x10, the results will be
unpredictable.
1.5.9
Secrets
F0 – F15. These secrets are used to generate the GC value for the particular CM/CRF chip based on the F1 algorithm,
SHA-1. Up to 16 F values that can be supported by the AT88SC118.
The low byte of the memory address of the first should be written into F-Bound. The three least significant bits of F-bound
are ignored. The first F value is always F0, independent of F-Bound. If F-bound is < RW-Bound or if F-Bound is < 0x80,
the results will be unpredictable.
Example: If F-Bound is 0xD0, the first F value is F0 at memory address 0x1D0. The last F value is F5 at address
0x1F8.
Example: If 0xFF is written into F-Bound, CMC will use only a single secret, named F0, which will be located at
address 0x1F8 (since the low three bits of F-bound are ignored).
These elements can never be read directly, nor can they be written after the part has been locked.
1.5.10 CF0 – CF15
This location within the EEPROM is initialized during Atmel manufacturing with a 16 byte random number obtained from
an external high quality hardware random number generator. It is used internally within the AT88SC118. It may be read
and/or written when the part is unlocked.
Caution: Atmel does not recommend that it be written to a fixed value.
1.5.11 Restricted Bytes
These locations within the EEPROM are initialized during Atmel manufacturing with a four byte random number obtained
from an external high quality hardware random number generator. It is used internally within the AT88SC118. It cannot
be read and/or written when the part is unlocked or locked. When reading from these locations, the result will be 0xFF for
these four bytes.
Atmel AT88SC118 [DATASHEET]
Atmel-8857A-CryptoComp-AT88SC118-Datasheet_052013
11
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