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부품번호 MC34065 기능
기능 High Performance Dual Channel Current Mode Controller
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MC34065 데이터시트, 핀배열, 회로
MC34065, MC33065
High Performance
Dual Channel Current
Mode Controller
The MC34065 is a high performance, fixed frequency, dual current
mode controllers. It is specifically designed for offline and dctodc
converter applications offering the designer a cost effective solution
with minimal external components. This integrated circuit feature a
unique oscillator for precise duty cycle limit and frequency control, a
temperature compensated reference, two high gain error amplifiers,
two current sensing comparators, Drive Output 2 Enable pin, and two
high current totem pole outputs ideally suited for driving power
MOSFETs.
Also included are protective features consisting of input and
reference undervoltage lockouts each with hysteresis, cyclebycycle
current limiting, and a latch for single pulse metering of each output.
The MC34065 and MC33065 are available in dualinline and
surface mount packages.
Unique Oscillator for Precise Duty Cycle Limit and Frequency
Control
Current Mode Operation to 500 kHz
Automatic Feed Forward Compensation
Separate Latching PWMs for CycleByCycle Current Limiting
Internally Trimmed Reference with Undervoltage Lockout
Drive Output 2 Enable Pin
Two High Current Totem Pole Outputs
Input Undervoltage Lockout with Hysteresis
Low Startup and Operating Current
VCC 16
Vref
15
R
5.0 V
Reference
VCC
Undervoltage
Lockout
1
Sync Input
3
RT
CT
2
Voltage
Feedback 1 4
Compensation 1
5
R Vref
Undervoltage
Lockout
Oscillator
+
Error
Amp 1
Latching
PWM 1
Drive
7 Output 1
Current
6 Sense 1
Drive Output 2
Enable 14
Voltage
Feedback 2 13
Compensation 2
12
+
Error
Amp 2
Gnd 8
Latching
PWM 2
Drive Gnd 9
Drive
10 Output 2
Current
1 Sense 2
1
This device contains 208 active transistors.
Figure 1. Representative Block Diagram
© Semiconductor Components Industries, LLC, 2006
July, 2006 Rev. 3
1
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16
1
16
1
PDIP16
P SUFFIX
CASE 648
SO16W
DW SUFFIX
CASE 751G
PIN CONNECTIONS
Sync Input 1
CT 2
RT 3
Voltage Feedback 1 4
Compensation 1 5
Current Sense 1 6
Drive Output 1 7
Gnd 8
16 VCC
15 Vref
14
Drive Output 2
Enable
13 Voltage Feedback 2
12 Compensation 2
11 Current Sense 2
10 Drive Output 2
9 Drive Gnd
(Top View)
ORDERING INFORMATION
Device
Package
Shipping
MC34065DWL
SO16W 47 Units/Rail
MC34065PL
PDIP16 25 Units/Rail
MC33065DWL
SO16W 47 Units/Rail
MC33065DWH SO16W 47 Units/Rail
MC33065DWHR2 SO16W 1000 Tape & Reel
MC33065PH
PDIP16 25 Units/Rail
MC33065PL
PDIP16 25 Units/Rail
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 16 of this data sheet.
Publication Order Number:
MC34065/D




MC34065 pdf, 반도체, 판매, 대치품
MC34065, MC33065
PIN FUNCTION DESCRIPTION
Pin Function
Description
1
Sync Input
A narrow rectangular waveform applied to this input will synchronize the oscillator. A dc voltage
within the range of 2.4 V to 5.5 V will inhibit the oscillator.
2 CT Timing capacitor CT connects from this pin to ground setting the freerunning oscillator
frequency range.
3 RT Resistor RT connects from this pin to ground precisely setting the charge current for CT. RT
must be between 4.0 k and 16 k.
4
Voltage Feedback 1
This pin is the inverting input of Error Amplifier 1. It is normally connected to the switching
power supply output through a resistor divider.
5
Compensation 1
This pin is the output of Error Amplifier 1 and is made available for loop compensation.
6
Current Sense 1
A voltage proportional to the inductor current is connected to this input. PWM 1 uses this
information to terminate conduction of output switch Q1.
7
Drive Output 1
This pin directly drives the gate of a power MOSFET Q1. Peak currents up to 1.0 A are sourced
and sunk by this pin.
8 Gnd This pin is the control circuitry ground return and is connected back to the source ground.
9
Drive Gnd
This pin is a separate power ground return that is connected back to the power source. It is
used to reduce the effects of switching transient noise on the control circuitry.
10
Drive Output 2
This pin directly drives the gate of a power MOSFET Q2. Peak currents up to 1.0 A are sourced
and sunk by this pin.
11
Current Sense 2
A voltage proportional to inductor current is connected to this input. PWM 2 uses this
information to terminate conduction of output switch Q2.
12
Compensation 2
This pin is the output of Error Amplifier 2 and is made available for loop compensation.
13
Voltage Feedback 2
This pin is the inverting input of Error Amplifier 2. It is normally connected to the switching
power supply output through a resistor divider.
14 Drive Output 2 Enable A logic low at this input disables Drive Output 2.
15 Vref This is the 5.0 V reference output. It can provide bias for any additional system circuitry.
16 VCC This pin is the positive supply of the control IC. The minimum operating voltage range after
startup is 11 V to 15.5 V.
16
14 3.3 nF
12
500 pF
1.0 nF
100 pF
220 pF
10
5.0 nF
330 pF
2.2 nF
8.0
CT =
10 nF
6.0
VCC = 15 V
TA = 25°C
4.0
10 k 30 k 50 k 100 k
300 k 500 k 1.0 M
fosc, OSCILLATOR FREQUENCY (Hz)
Figure 2. Timing Resistor versus
Oscillator Frequency
50
48
46 Output 2
44 Output 1
42 VCC = 15 V
RT = 4.0 k to 16 k
40
CL = 15 pF
TA = 25°
38
10 k
30 k 50 k 100 k
300 k 500 k
fosc, OSCILLATOR FREQUENCY (Hz)
Figure 3. Maximum Output Duty Cycle
versus Oscillator Frequency
1.0 M
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MC34065 전자부품, 판매, 대치품
MC34065, MC33065
OPERATING DESCRIPTION
The MC34065 series are high performance, fixed
frequency, dual channel current mode controllers specifically
designed for OffLine and dctodc converter applications.
These devices offer the designer a cost effective solution with
minimal external components where independent regulation
of two power converters is required. The Representative
Block Diagram is shown in Figure 16. Each channel contains
a high gain error amplifier, current sensing comparator, pulse
width modulator latch, and totem pole output driver. The
oscillator, reference regulator, and undervoltage lockout
circuits are common to both channels.
Oscillator
The unique oscillator configuration employed features
precise frequency and duty cycle control. The frequency is
programmed by the values selected for the timing
components RT and CT. Capacitor CT is charged and
discharged by an equal magnitude internal current source
and sink, generating a symmetrical 50 percent duty cycle
waveform at Pin 2. The oscillator peak and valley thresholds
are 3.5 V and 1.6 V respectively. The source/sink current
magnitude is controlled by resistor RT. For proper operation
over temperature it must be in the range of 4.0 kΩ to 16 kΩ
as shown in Figure 2.
As CT charges and discharges, an internal blanking pulse
is generated that alternately drives the center inputs of the
upper and lower NOR gates high. This, in conjunction with
a precise amount of delay time introduced into each channel,
produces well defined nonoverlapping output duty cycles.
Output 2 is enabled while CT is charging, and Output 1 is
enabled during the discharge. Figure 3 shows the Maximum
Output Duty Cycle versus Oscillator Frequency. Note that
even at 500 kHz, each output is capable of approximately
44% ontime, making this controller suitable for high
frequency power conversion applications.
In many noise sensitive applications it may be desirable to
frequencylock the converter to an external system clock.
This can be accomplished by applying a clock signal as
shown in Figure 18. For reliable locking, the freerunning
oscillator frequency should be set about 10% less than the
clock frequency. Referring to the timing diagram shown in
Figure 17, the rising edge of the clock signal applied to the
Sync input, terminates charging of CT and Drive Output 2
conduction. By tailoring the clock waveform symmetry,
accurate duty cycle clamping of either output can be
achieved. A circuit method for this, and multiunit
synchronization, is shown in Figure 19.
Error Amplifier
Each channel contains a fullycompensated Error Amplifier
with access to the inverting input and output. The amplifier
features a typical dc voltage gain of 100 dB, and a unity gain
bandwidth of 1.0 MHz with 71° of phase margin (Figure 6).
The noninverting input is internally biased at 2.5 V and is not
pinned out. The converter output voltage is typically divided
down and monitored by the inverting input through a resistor
divider. The maximum input bias current is 1.0 μA which
will cause an output voltage error that is equal to the product
of the input bias current and the equivalent input divider
source resistance.
The Error Amp output (Pin 5, 12) is provided for external
loop compensation. The output voltage is offset by two
diode drops (1.4 V) and divided by three before it connects
to the inverting input of the Current Sense Comparator. This
guarantees that no pulses appear at the Drive Output
(Pin 7, 10) when the error amplifier output is at its lowest
state (VOL). This occurs when the power supply is operating
and the load is removed, or at the beginning of a softstart
interval (Figures 21, 22).
The minimum allowable Error Amp feedback resistance
is limited by the amplifier’s source current (0.5 mA) and the
output voltage (VOH) required to reach the comparator’s
0.5 V clamp level with the inverting input at ground. This
condition happens during initial system startup or when the
sensed output is shorted:
Rf(min)
[
3.0
(0.5 V) )
0.5 mA
1.4 V
+
5800 W
Current Sense Comparator and PWM Latch
The MC34065 operates as a current mode controller,
whereby output switch conduction is initiated by the
oscillator and terminated when the peak inductor current
reaches the threshold level established by the Error
Amplifier output. Thus the error signal controls the peak
inductor current on a cyclebycycle basis. The Current
Sense ComparatorPWM Latch configuration used ensures
that only a single pulse appears at the Drive Output during
any given oscillator cycle. The inductor current is converted
to a voltage by inserting a groundreferenced sense resistor
RS in series with the source of output switch Q1. This
voltage is monitored by the Current Sense Input (Pin 6, 11)
and compared to a level derived from the Error Amp output.
The peak inductor current under normal operating
conditions is controlled by the voltage at Pin 5, 12 where:
Ipk
+
V(Pin
5, 12)
3 RS
1.4
V
Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing is
lost. Under these conditions, the Current Sense Comparator
threshold will be internally clamped to 0.5 V. Therefore the
maximum peak switch current is:
Ipk(max)
+
0.5 V
RS
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