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PDF VIPer35 Data sheet ( Hoja de datos )

Número de pieza VIPer35
Descripción Quasi-resonant high performance off line high voltage converter
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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VIPer35
Quasi-resonant high performance off line high voltage converter
621
6',3
Figure 1. Basic application schematic

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Features
800 V avalanche-rugged power MOSFET
allowing ultra wide range input VAC to be
achieved
Embedded HV start-up and senseFET
Built-in soft-start
Quasi-resonant current mode PWM controller
with drain current limit (IDlim)
Multifunction ZCD pin:
– Zero-current detection
– OCP threshold (IDlim) setup
– Output OVP (auto-restart)
– Feed-forward compensation
Support isolated flyback topology with opto-
coupler
Frequency limit:
– 136 kHz (L type), 225 kHz (H type)
Datasheet - production data
Less than 30 mW @ 230 VAC in no-load
condition
Brown-out set through resistor divider
Short-circuit protection (auto-restart)
Hysteretic thermal shutdown
Applications
Auxiliary power supply
Adapter/charger for PDA, camcorders,
shavers, tablet, video games, STB
Supplies for industrial systems, metering,
appliances
Description
The device is a high voltage converter, which
smartly integrates an 800 V rugged power
MOSFET with a quasi-resonant current mode
PWM control. This IC meets severe energy
saving standards as it has very low consumption
and operates in burst mode under light load
conditions.
The device features the brown-out enabling the
IC to set the switch-off and switch-on threshold
independently one of each other. The quasi-
resonant operation reduces the level of EMI and
the quantity of components in the application.
The quasi-resonant operation reduces the
switching losses and improves power conversion
efficiency. The device features high level
protections such as: output overvoltage, short-
circuit and thermal shutdown with hysteresis.
After the removal of a fault condition, the IC is
automatically restarted.
February 2016
DocID026980 Rev 4
1/44
www.st.com

1 page




VIPer35 pdf
VIPer35
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
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Figure 15.
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Figure 25.
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Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Basic application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
VDDon vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VDD(RESTART) vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IDlim vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VDRAIN_START vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
HFB vs TJ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VBRth vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VBRhyst vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IBRhysvs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IDD0 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IDD1 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
VZCD vs IZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IDlim vs IZCD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
RDS(on) vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
VBVDSS vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
IDDch1 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
IDDch2 vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FOSClim_L vs TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
FOSClim_H vs TJ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Thermal shutdown timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Min-feature quasi-resonant flyback (isolated) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Full-feature quasi-resonant flyback (isolated) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Power supply consumption at light output loads, VOUT = 12 V . . . . . . . . . . . . . . . . . . . . . . 18
Power supply consumption at no output load, VOUT = 12 V . . . . . . . . . . . . . . . . . . . . . . . . 18
IDD current during start-up and burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Timing diagram: normal power-up and power-down sequence . . . . . . . . . . . . . . . . . . . . . 21
Timing diagram: start-up phase and soft-start (case 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Timing diagram: start-up phase and soft-start (case 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Timing diagram: behavior after short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Switching frequency vs power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Zero-current detection circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Drain ringing cycle skipping as the load progressively reduces . . . . . . . . . . . . . . . . . . . . . 25
Timing diagram: double blanking time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Typical power capability vs input voltage in quasi-resonant converter . . . . . . . . . . . . . . . . 28
ZCD pin typical external configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Timing diagram: OVP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FB pin configuration (minimal BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
FB pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Timing diagram: overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Burst mode timing: light load management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Brown-out: external setting and timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
SO16N package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
SDIP10 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DocID026980 Rev 4
5/44
44

5 Page





VIPer35 arduino
VIPer35
Electrical ratings
Symbol
Table 7. Controller section (continued)
Parameter
Test conditions
Min.
ZCD pin
VZCDCLh
VZCDAth
Upper clamp voltage IZCD = 1 mA
Arming voltage
threshold
Positive-going edge
VZCDTth
Triggering voltage
threshold
Negative-going edge
IZCD
tDELAY
Internal pull-up
Turn-on delay after
ZCD trigger
VFB < VFBlin
tBLANK
Turn-on inhibit time
after MOSFET turn-
off
VZCD < 1 V
VZCD >1 V
Current limitation
IDlim
Drain current
limitation
tSS Soft-start time
VFB = 4 V
IZCD = -10 µA
TJ = 25 °C
VFB = 4 V
IZCD = - 55 µA
TJ = 25 °C
VFB = 4 V
IZCD = - 105 µA
TJ = 25 °C
VIPER35L
VIPER35H
tSU Start-up time
VIPER35L
VIPER35H
tON_MIN
Minimum turn-on
time
td Propagation delay (1)
tLEB
Leading edge
blanking
(1)
ID_BM
Peak drain current
during burst mode
VFB = 0.6 V
5
0.75
0.55
-7.5
0.95
0.68
0.55
7.5
9.5
220
120
Typ.
5.5
0.8
0.6
-10
300
6.3
2.5
1
0.8
0.65
400
100
300
170
Max. Unit
6
0.85
0.65
-12.5
V
V
V
µA
ns
µs
µs
1.05 A
0.92 A
0.75 A
3.5 ms
4.2 ms
15 ms
18 ms
480 ns
ns
ns
220 mA
DocID026980 Rev 4
11/44
44

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