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FDV303N 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 FDV303N은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 FDV303N 기능
기능 N-Channel Digital FET
제조업체 Fairchild Semiconductor
로고 Fairchild Semiconductor 로고


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FDV303N 데이터시트, 핀배열, 회로
FDV303N
Digital FET, N-Channel
General Description
These N-Channel enhancement mode field effect transistors are
produced using Fairchild's proprietary, high cell density, DMOS
technology. This very high density process is tailored to minimize
on-state resistance at low gate drive conditions. This device is
designed especially for application in battery circuits using either
one lithium or three cadmium or NMH cells. It can be used as an
inverter or for high-efficiency miniature discrete DC/DC
conversion in compact portable electronic devices like cellular
phones and pagers. This device has excellent on-state
resistance even at gate drive voltages as low as 2.5 volts.
July 2014
Features
25 V, 0.68 A continuous, 2 A Peak.
RDS(ON) = 0.45 @ VGS = 4.5 V
RDS(ON) = 0.6 @ VGS= 2.7 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. VGS(th) < 1V.
Gate-Source Zener for ESD ruggedness.>6kV
Human Body Model
Compact industry standard SOT-23 surface mount
package.
Alternative to TN0200T and TN0201T.
SOT-23
Mark:303
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
D
Absolute Maximum Ratings TA = 25oC unless other wise noted
Symbol Parameter
VDSS Drain-Source Voltage, Power Supply Voltage
VGSS
Gate-Source Voltage, VIN
ID Drain/Output Current - Continuous
- Pulsed
PD
TJ,TSTG
ESD
Maximum Power Dissipation
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient
© 1997 Fairchild Semiconductor Corporation
GS
FDV303N
25
8
0.68
2
0.35
-55 to 150
6.0
357
Units
V
V
A
W
°C
kV
°C/W
FDV303N Rev.D2




FDV303N pdf, 반도체, 판매, 대치품
Typical Electrical And Thermal Characteristics
5
ID = 0.5A
4
3
VDS = 5V
10V
15V
2
1
0
0 0.4 0.8 1.2 1.6
Qg , GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
2
150
100
50 Ciss
20
f = 1 MHz
10 VGS = 0V
Coss
Crss
5
0.1
0.5 1
2
5 10
25
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance Characteristics.
5
3
1
0.3
0.1
0.03
0.01
0.1
RDS(ON) LIMIT
V GS= 4.5V
SINGLE PULSE
R θJA =357°C/W
TA = 25°C
1ms
10ms
100ms
1s
10s
DC
0.2
0.5 1
2
5 10 20 40
VDS , DRAI N-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
5
4
3
2
1
0
0.001
SINGLE PULSE
RθJA =357° C/W
TA = 25°C
0.01 0.1 1 10
SINGLE PULSE TIME (SEC)
100 300
Figure 10. Single Pulse Maximum Power
Dissipation.
1
0.5 D = 0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.2
0.1
0.05
0.02
0.01
Single Pulse
0.002
0.001
0.0001
0.001
0.01
0.1
t1 , TIME (sec)
1
R θJA (t) = r(t) * R θJA
R θJA = 357 °C/W
P(pk)
t1 t 2
TJ - TA = P * R θJA(t)
Duty Cycle, D = t1 /t2
10 100
300
Figure 11. Transient Thermal Response Curve.
FDV303N Rev.D2

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관련 데이터시트

부품번호상세설명 및 기능제조사
FDV303N

N-Channel Digital FET

Fairchild Semiconductor
Fairchild Semiconductor

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