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PDF AD7485 Data sheet ( Hoja de datos )
| Número de pieza | AD7485 | |
| Descripción | Serial 14-Bit SAR ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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a
1 MSPS, Serial 14-Bit SAR ADC
AD7485
FEATURES
Fast Throughput Rate: 1 MSPS
Wide Input Bandwidth: 40 MHz
Excellent DC Accuracy Performance
Flexible Serial Interface
Low Power:
80 mW (Full Power) and 3 mW (NAP Mode)
STANDBY Mode: 2 A Max
Single 5 V Supply Operation
Internal 2.5 V Reference
Full-Scale Overrange Indication
GENERAL DESCRIPTION
The AD7485 is a 14-bit, high speed, low power, successive-
approximation ADC. The part features a serial interface with
throughput rates up to 1 MSPS. The part contains a low noise,
wide bandwidth track-and-hold that can handle input frequencies
in excess of 40 MHz.
The conversion process is a proprietary algorithmic successive-
approximation technique. The input signal is sampled and a
conversion is initiated on the falling edge of the CONVST signal.
The conversion process is controlled by an external master
clock. Interfacing is via standard serial signal lines, making the
part directly compatible with microcontrollers and DSPs.
The AD7485 provides excellent ac and dc performance specifi-
cations. Factory trimming ensures high dc accuracy resulting in
very low INL, DNL, offset, and gain errors.
The part uses advanced design techniques to achieve very low
power dissipation at high throughput rates. Power consumption
in the normal mode of operation is 80 mW. There are two power-
saving modes: a NAP mode keeps reference circuitry alive for
quick power-up and consumes 3 mW, while a STANDBY mode
reduces power consumption to a mere 10 µW.
FUNCTIONAL BLOCK DIAGRAM
AVDD AGND CBIAS DVDD VDRIVE DGND
REFSEL
2.5 V
REFERENCE
BUF
VIN
NAP
STBY
RESET
CONVST
14-BIT
ALGORITHMIC
T/H SAR
AD7485
CONTROL
LOGIC AND I/O
REGISTERS
REFOUT
REFIN
MCLK
TFS
SCO
SDO
SMODE
The AD7485 features an on-board 2.5 V reference, but the part can
also accommodate an externally provided 2.5 V reference source.
The nominal analog input range is 0 V to 2.5 V.
The AD7485 also provides the user with overrange indication via a
fifteenth bit. If the analog input range strays outside the 0 V to
2.5 V input range, the fifteenth data bit is set to a logic high.
The AD7485 is powered from a 4.75 V to 5.25 V supply. The
part also provides a VDRIVE pin that allows the user to set the
voltage levels for the digital interface lines. The range for this
VDRIVE pin is from 2.7 V to 5.25 V. The part is housed in a
48-lead LQFP package and is specified over a –40°C to +85°C
temperature range.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/461-3113
© Analog Devices, Inc., 2010
1 page  
AD7485
ABSOLUTE MAXIMUM RATINGS*
(TA = 25°C, unless otherwise noted.)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
VDRIVE to GND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Input Voltage to GND . . . . . . –0.3 V to AVDD + 0.3 V
Digital Input Voltage to GND . . . . . –0.3 V to VDRIVE + 0.3 V
REFIN to GND . . . . . . . . . . . . . . . . –0.3 V to AVDD + 0.3 V
Input Current to Any Pin except Supplies . . . . . . . . . ± 10 mA
Operating Temperature Range
Commercial . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . 50°C/W
JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . 10°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although the AD7485
features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to
high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid
performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
PIN CONFIGURATION
48 47 46 45 44 43 42 41 40 39 38 37
AVDD
CBIAS
AGND
1
2
3
AGND 4
AVDD 5
AGND 6
VIN 7
REFOUT 8
REFIN 9
REFSEL 10
AGND 11
AGND 12
PIN 1
IDENTIFIER
AD7485
TOP VIEW
(Not to Scale)
36 SMODE
35 TFS
34 DGND
33 DGND
32 VDRIVE
31 DGND
30 DGND
29 DVDD
28 DGND
27 DGND
26 DGND
25 DGND
13 14 15 16 17 18 19 20 21 22 23 24
–4– REV. A
5 Page 
AD7485
Figure 7 shows the AD7485 conversion sequence operating in
normal mode.
2s
CONVST
TFS READ DATA
960ns
CONVERSION
FINISHED
1.04s
Figure 7. Normal Mode Power Dissipation
In NAP mode, all the internal circuitry except for the internal
reference is powered down. In this mode, the power dissipation
of the AD7485 is reduced to 3 mW. When exiting NAP mode,
a minimum of 300 ns when using an external reference must be
waited before initiating a conversion. This is necessary to allow
the internal circuitry to settle after power-up and for the track/hold
to properly acquire the analog input signal.
If the AD7485 is put into NAP mode after each conversion, the
average power dissipation will be reduced but the throughput
rate will be limited by the power-up time. Using the AD7485 with
a throughput rate of 100 kSPS while placing the part in NAP
mode after each conversion would result in average power dissi-
pation as follows:
The power-up phase contributes:
(300 ns/10 s) × (5V × 12 mA) = 1.8 mW
The conversion phase contributes:
(960 ns/10 s) × (5V × 16 mA) = 7.68 mW
While in NAP mode for the rest of the cycle, the AD7485 dissipates
only 2.185 mW of power.
(8.74 s/10 s) × (5V × 0.6 mA) = 2.622 mW
Thus the power dissipated during each cycle is:
1.8 mW + 7.68 mW + 2.622 mW + 12.1 mW
Figure 8 shows the AD7485 conversion sequence if putting the
part into NAP mode after each conversion.
1.26s
8.74s
NAP
CONVST
300ns
TFS
10s
Figure 8. NAP Mode Power Dissipation
Figures 9 and 10 show a typical graphical representation of
power versus throughput for the AD7485 when in normal and
NAP modes, respectively.
80
78
76
74
72
70
68
66
64
62
60
0
100 200 300 400 500 600 700 800 900 1000
THROUGHPUT – kSPS
Figure 9. Normal Mode, Power vs. Throughput
50
45
40
35
30
25
20
15
10
5
0
0 50 100 150 200 250 300 350 400 450 500
THROUGHPUT – kSPS
Figure 10. NAP Mode, Power vs. Throughput
In STANDBY mode, all the internal circuitry is powered down
and the power consumption of the AD7485 is reduced to 10 µW.
Because the internal reference has been powered down, the
power-up time necessary before a conversion can be initiated is
longer. If using the internal reference of the AD7485, the ADC
must be brought out of STANDBY mode 500 ms before a conver-
sion is initiated. Initiating a conversion before the required
power-up time has elapsed will result in incorrect conversion
data. If an external reference source is used and kept powered up
while the AD7485 is in STANDBY mode, the power-up time
required will be reduced to 80 µs.
–10–
REV. A
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet AD7485.PDF ] | |
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