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AD6311 PDF 데이터시트 ( Data , Function )

부품번호 AD6311 기능
기능 1/8- to 1/16 Duty VFD Controller/Driver
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AD6311 데이터시트, 핀배열, 회로
1/8- to 1/16 Duty VFD Controller/Driver
AD6311
Features
- 4-pin serial interface
- Key scanning (12x4 matrices)
- Programming display modes (16-digit & 12-
segment to 8-digit & 20-segment)
- Programming dimming step
- High-voltage output (VDD-35V max)
- 5 channels LED ports
- 4-pin general-purpose input port
- Built-in oscillator
- No external resistor necessary for driver outputs
Pin Assignments
General Description
The AD6311 is a VFD (Vacuum Fluorescent
Display) controller/driver that is driven on a 1/8- to
1/16 duty factor (include key scan). It consists of 12
segment/key scan output lines, 8 grid output lines,
8 segment/grid output drive lines, a display memory,
a control circuit, and a key scan circuit. Serial data
is input to the AD6311 through a four-line serial
interface.
Grid5
Grid4
Grid3
Grid2
Grid1
VDD
LED5
LED4
LED3
LED2
LED1
VSS
OSC
40
41
42
43
44
45
46
47
48
49
50
51
52
26 Seg12 / KS12
25 Seg11 / KS11
24 Seg10 / KS10
23 Seg9 / KS9
22 Seg8 / KS8
21 Seg7 / KS7
20 Seg6 / KS6
19 Seg5 / KS5
18 Seg4 / KS4
17 Seg3 / KS3
16 Seg2 / KS2
15 Seg1 / KS1
14 VDD
Use all the power pins.
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev. A5 Dec 29, 2003
1/11




AD6311 pdf, 반도체, 판매, 대치품
1/8- to 1/16 Duty VFD Controller/Driver
AD6311
Absolute Maximum Ratings (TA=25,VSS=0V )
Parameter
Logic supply voltage
Driver supply voltage
Logic input voltage
VFD driver output voltage
LED driver output current
VFD driver output current
Operating ambient temperature
Storage temperature
Symbol
VDD
VEE
VI1
VO2
IO1
IO2
TOPT
TSTG
Rating
-0.5 to +7.0
VDD +0.5 to VDD -40
-0.5 to VDD +0.5
VEE-0.5 to VDD +0.5
+15
-40(grid) –15 (segment)
-25 to +85
-50 to +125
Unit
V
V
V
V
mA
mA
Operating Conditions (TA=0 to +70,VSS=0V)
Parameter
Logic supply voltage
High-level input voltage
Low-level input voltage
Driver supply voltage
Symbol
VDD
VIH
VIL
VEE
Conditions
Min.
4.5
0.7·VDD
0
0
Typ.
5
Max.
5.5
VDD
0.3xVDD
VDD-35
Unit
V
V
V
V
DC Characteristics (Ta=0 to 70, VDD=4.5 to 5.5V, VSS=0V, VEE=VDD-35V)
Parameter
High-level output voltage
Low-level output voltage
Low-level output voltage
High-level output current
High-level output current
Driver leakage current
Output pull-down resistor
High-level input voltage
Low-level input voltage
Symbol
VOH1
VOL1
VOL2
IOH21
IOH22
IOLEAK
RL
VIH
VIL
Conditions
LED1-LED5,IOH1=-1mA
LED1-LED5,IOL1=12mA
DOUT,IOL2=2mA
VO=VDD-2V,Seg1 to Seg12
VO=VDD-2V,Grid 1 to Grid8,
Seg13/Grid16 to Seg20/Grid9
VO=VDD-35V, driver off
Driver output
Min.
0.9VDD
-3
-15
50
0.7VDD
Typ.
100
Max.
1
0.4
-10
150
0.3VDD
Unit
V
V
V
mA
mA
μA
kΩ
V
V
AC Characteristics (Ta=0 to +70,VDD=4.5 to 5.5 V)
Parameter
Oscillation frequency
Maximum clock frequency
Clock pulse width
Strobe pulse width
Data setup time
Data hold time
Clock-strobe time
Wait time
Note: Refer to page 8.
Symbol
fOSC
fmax.
PWCLK
PWSTB
tSETUP
tHOLD
tCLK-STB
tWAIT
Conditions
R=51 kΩ
Duty=50%
CLK↑→STB
CLK↑→CLk(Note)
Min.
350
500
1
100
100
1
1
Typ.
500
Max.
650
1
Unit
KHZ
MHZ
ns
µs
ns
ns
µs
µs
Anachip Corp.
www.anachip.com.tw
4/11
Rev. A5 Dec 29, 2003

4페이지










AD6311 전자부품, 판매, 대치품
1/8- to 1/16 Duty VFD Controller/Driver
AD6311
Lower 4 bits
Higher 4 bits
Only the lower 4 bits of the addresses assigned to Seg17 through Seg20 are valid, and the higher 4 bits
are ignored.
3.0 LED Port
Data is written to the LED port by a write command, starting from the least significant bit of the port.
When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED goes off . The data
of bits 6 through 8 is ignored.
MSB
LSB
- - - b4 b3 b2 b1 b0
Don't care
On power application, all the LEDs remain dark.
4.0 Key Matrix and Key-Input data Storage RAM
The key matrix is of 12×4 configuration, as shown below.
LED1
LED2
LED3
LED4
LED5
KEY1
KEY2
KEY3
KEY4
The data of each key is stored as illustrated below, and is read by a read command, starting from the least
significant bit. When the most significant bit of data (Seg12 b7) has been read, the least significant bit of the
next data (Seg1 b0) is read.
KEY1...KEY4
Seg1/KS1
Seg3/KS3
Seg5/KS5
Seg7/KS7
Seg9/KS9
Seg11/KS11
b0--------b3
KEY1...KEY4
Seg2/KS2
Seg4/KS4
Seg6/KS6
Seg8/KS8
Seg10/KS10
Seg12/KS12
b4--------b7
Reading sequence
Anachip Corp.
www.anachip.com.tw
7/11
Rev. A5 Dec 29, 2003

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