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PDF AD841 Data sheet ( Hoja de datos )
| Número de pieza | AD841 | |
| Descripción | Fast Settling Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
FEATURES
AC performance
Unity-gain bandwidth: 40 MHz
Fast settling time: 110 ns to 0.01%
Slew rate: 300 V/µs
Full power bandwidth: 4.7 MHz for 20 V p-p into a 500 Ω load
DC performance
Input offset voltage: 1 mV maximum
Input voltage noise: 15 nV/√Hz typical
Open-loop gain: 45 V/mV into a 1 kΩ load
Output current: 50 mA minimum
Supply current: 12 mA maximum
APPLICATIONS
High speed signal conditioning
Video and pulse amplifiers
Data acquisition systems
Line drivers
Active filters
Available in 14-pin plastic PDIP, 14-pin hermetic CERDIP, and
20-pin LCC packages
Chips and MIL-STD-883B parts available
GENERAL DESCRIPTION
The AD841 is a member of the Analog Devices, Inc., family of
wide bandwidth operational amplifiers. This high speed/high
precision family includes the AD842, which is stable at a gain of
two or greater and has 100 mA minimum output current drive.
These devices are fabricated using Analog Devices’ junction
isolated complementary bipolar (CB) process. This process
permits a combination of dc precision and wideband ac perfor-
mance previously unobtainable in a monolithic op amp. In
addition to its 40 MHz unity-gain bandwidth product, the
AD841 offers extremely fast settling characteristics, typically
settling to within 0.01% of final value in 110 ns for a 10 V step.
Unlike many high frequency amplifiers, the AD841 requires no
external compensation. It remains stable over its full operating
temperature range. It also offers a low quiescent current of
12 mA maximum, a minimum output current drive capability
of 50 mA, a low input voltage noise of 15 nV/√Hz, and low
input offset voltage of 1 mV maximum.
The 300 V/µs slew rate of the AD841, along with its 40 MHz
gain bandwidth, ensures excellent performance in video and
pulse amplifier applications. This amplifier is well suited for
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
Wideband, Unity-Gain Stable,
Fast Settling Op Amp
AD841
CONNECTION DIAGRAMS
NC 1
NC 2
AD841
14 NC
13 NC
BALANCE 3
12 BALANCE
–INPUT 4
+INPUT 5
11 +VS
10 OUTPUT
–VS 6 TOP VIEW 9 NC
NC 7 (Not to Scale) 8 NC
NOTES
1. NC = NO CONNECT.
Figure 1. PDIP (N-14) Package and CERDIP (Q-14) Package
3 2 1 20 19
NC 4
–INPUT 5
NC 6
+INPUT 7
NC 8
AD841
18 NC
17 +VS
16 NC
15 OUTPUT
14 NC
9 10 11 12 13
NOTES
1. NC = NO CONNECT.
Figure 2. LCC (E-20-1) Package
use in high frequency signal conditioning circuits and wide
bandwidth active filters. The extremely rapid settling time of
the AD841 makes it the preferred choice for data acquisition
applications that require 12-bit accuracy. The AD841 is also
appropriate for other applications such as high speed DAC and
ADC buffer amplifiers and other wide bandwidth circuitry.
PRODUCT HIGHLIGHTS
1. The high slew rate and fast settling time of the AD841
make it ideal for DAC and ADC buffers, and all types of
video instrumentation circuitry.
2. The AD841 is a precision amplifier. It offers accuracy to
0.01% or better and wide bandwidth performance
previously available only in hybrids.
3. The AD841’s thermally balanced layout and the speed of
the CB process allow the AD841 to settle to 0.01% in 110 ns
without the long tails that occur with other fast op amps.
4. Laser wafer trimming reduces the input offset voltage to
1 mV maximum on the K grade, thus eliminating the need
for external offset nulling in many applications. Offset null
pins are provided for additional versatility.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD841
Data Sheet
Parameter
TEMPERATURE RANGE
Rated Performance5
Test Conditions/
Comments
AD841J
AD841K
AD841S1
Min Typ Max Min Typ Max Min Typ
Max Unit
0 70 0
70 −55
+125 °C
1 Standard military drawing available: 5962-89641012A – (SE/883B).
2 Input offset voltage specifications are guaranteed after 5 minutes at TA = 25°C.
3 Full power bandwidth = slew rate/2 π VPEAK.
4 Refer to Figure 22 to Figure 24.
5 S grade TMIN – TMAX specifications are tested with automatic test equipment at TA = −55°C and TA = +125°C.
Rev. C | Page 4 of 16
5 Page 
AD841
THEORY OF OPERATION
OFFSET NULLING
The input offset voltage of the AD841 is very low for a high
speed op amp, but if additional nulling is required, the circuit
shown in Figure 28 can be used.
+VS
100Ω
100Ω
3
4–
12
11
INPUT AD841
10
5+
6 0.1µF
2.2µF
OUTPUT
RL
–VS
Figure 28. Offset Nulling (PDIP Pinout)
INPUT CONSIDERATIONS
An input resistor (RIN in Figure 25) is recommended in circuits
where the input to the AD841 is subjected to transient or
continuous overload voltages exceeding the ±6 V maximum
differential limit. This resistor provides protection for the input
transistors by limiting the maximum current that can be forced
into the input.
For high performance circuits it is recommended that a resistor
(RB in Figure 22 and Figure 25) be used to reduce bias current
errors by matching the impedance at each input. The output
voltage error caused by the offset current is more than an order
of magnitude less than the error present if the bias current error
is not removed.
AD841 SETTLING TIME
Figure 29 and Figure 31 show the settling performance of the
AD841 in the test circuit shown in Figure 30.
Settling time is defined as the interval of time from the
application of an ideal step function input until the closed-loop
amplifier output has entered and remains within a specified
error band.
This definition encompasses the major components, which
comprise settling time. They include
• Propagation delay through the amplifier
• Slewing time to approach the final output value
• The time of recovery from the overload associated
with slewing
• Linear settling to within the specified error band
Expressed in these terms, the measurement of settling time
is obviously a challenge and needs to be done accurately to
assure the user that the amplifier is worth consideration for
the application.
Data Sheet
10mV
100
90
5V
20ns
OUTPUT ERROR:
0.02%/DIV
10
OUTPUT:
0% 5V/DIV
Figure 29. AD841 0.01% Settling Time
ERROR
AMP
(×10)
TEK
7A13
TEK
7A18
HP6263
DDD5109
FLAT-TOP
PULSE
GENERATOR
1kΩ 1kΩ
1kΩ 1kΩ
50Ω
+15V 0.1µF
2.2µF
499Ω
4–
11
AD841
10
5+
6 0.1µF
2.2µF
FET PROBE
TEK P6201
499Ω
–15V
Figure 30. Settling Time Test Circuit
Measurement of the 0.01% settling in 110 ns was accomplished
by amplifying the error signal from a false summing junction
with a very high speed proprietary hybrid error amplifier
specially designed to enable testing of small settling errors.
The device under test was driving a 500 Ω load. The input to
the error amp is clamped to avoid possible problems associated
with the overdrive recovery of the oscilloscope input amplifier.
The error amp gains the error from the false summing junction
by 10, and it contains a gain vernier to fine trim the gain.
Rev. C | Page 10 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AD841.PDF ] | |
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