|
|
PDF 54LS77 Data sheet ( Hoja de datos )
| Número de pieza | 54LS77 | |
| Descripción | 4-BIT D LATCH | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de 54LS77 (archivo pdf) en la parte inferior de esta página. Total 4 Páginas | ||
|
No Preview Available !
4-BIT D LATCH
The TTL/MSI SN54 / 74LS75 and SN54 / 74LS77 are latches used as tem-
porary storage for binary information between processing units and input /out-
put or indicator units. Information present at a data (D) input is transferred to
the Q output when the Enable is HIGH and the Q output will follow the data
input as long as the Enable remains HIGH. When the Enable goes LOW, the
information (that was present at the data input at the time the transition oc-
curred) is retained at the Q output until the Enable is permitted to go HIGH.
The SN54 / 74LS75 features complementary Q and Q output from a 4-bit
latch and is available in the 16-pin packages. For higher component density
applications the SN54 / 74LS77 4-bit latch is available in the 14-pin package
with Q outputs omitted.
CONNECTION DIAGRAMS DIP (TOP VIEW)
Q0 Q1 Q1 E0–1 GND Q2 Q2 Q3
16 15 14 13 12 11 10 9
SN54 / 74LS75
1 2 3 4 56 78
Q0 D0 D1 E2–3 VCC D2 D3 Q3
Q0 Q1 E0–1 GND NC Q2 Q3
14 13 12 11 10 9 8
SN54 / 74LS77
1234567
D0 D1 E2–3 VCC D2 D3 NC
PIN NAMES
LOADING (Note a)
HIGH
LOW
D1–D4
E0–1
E2–3
Q1–Q4
Q1–Q4
Data Inputs
Enable Input Latches 0, 1
Enable Input Latches 2, 3
Latch Outputs (Note b)
Complimentary Latch Outputs (Note b)
0.5 U.L.
2.0 U.L.
2.0 U.L.
10 U.L.
10 U.L.
0.25 U.L.
1.0 U.L.
1.0 U.L.
5 (2.5) U.L.
5 (2.5) U.L.
NOTES:
a) 1 Unit Load (U.L.) = 40 µA HIGH.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
TRUTH TABLE
(Each latch)
tn tn + 1
DQ
HH
LL
NOTES:
tn = bit time before enable
negative-going transition
tn+1 = bit time after enable
negative-going transition
SN54/74LS75
SN54/74LS77
4-BIT D LATCH
LOW POWER SCHOTTKY
16
1
16
1
16
1
14
1
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
D SUFFIX
SOIC
CASE 751B-03
J SUFFIX
CERAMIC
CASE 632-08
14
1
14
1
N SUFFIX
PLASTIC
CASE 646-06
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
SN54LSXXJ
SN74LSXXN
SN74LSXXD
Ceramic
Plastic
SOIC
FAST AND LS TTL DATA
5-1
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet 54LS77.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 54LS74 | Dual Positive-Edge-Triggered D Flip-Flops |  National Semiconductor |
| 54LS74A | 54LS74 DM54LS74A Dual Pos-Edge-Trig D FFlops w/Preset Clear Compl Out (Rev. A) |  Texas Instruments |
| 54LS74A | Dual D-Type Positive-Edge -Triggered Flip-Flops With Preset And Clear | Texas Instruments |
| 54LS75 | 4-BIT D LATCH | Motorola Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |